INDEPENDENT Search Results

Contextual Info: SN74ALS233B 16x5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS253 - MARCH 1990 - REVISED JUNE 1992 • Independent Asychronous Inputs and Outputs DW OR N PACKAGE TOP VIEW • 16 Words by 5 Bits OE [ 1 FULL-1 [ 2 • Data Rates From 0 to 40 MHz • Fall-Through Ti me. . . 14 ns Typ

Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS _ SCAS115- D3456, MARCH 1990-REVISEDAPRIL 1933 Inputs Are TTL-Voltage Compatible Independent Registers A and B Buses Multiplexed Real-Time and Stored Data Inverting Data Paths

Contextual Info: S N 5 4 A LS 2 2 9 A , S N 7 4 A LS 2 2 9 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . M A R C H 1 9 8 6 -R E V IS E D M A Y 1 9 8 6 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits Each • Data Rates from 0 to 30 MHz

TC5066BP

Abstract: TC5067BP M55-3
Contextual Info: TC5066BP, TC5067BP C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC5066BP TC5067BP 7-HIGH VOLTAGE BUFFER/NON INVERTING TYPE 7-HIGH VOLTAGE BUFFER/INVERTING TYPE TC5066BP and TC5067BP contain seven independent circuits of buffers. TC5066BP in non-inverting type

Contextual Info: SN74ALS232B 1 6 x 4 ASYNCHRONOUS FIRST IN, FIRST OUT MEMORY D3247 • Independent Asynchronous Inputs and Outputs DW OR N PACKAGE Package Options Include Plastic "Sm all O utline" Packages, Plastic Chip Carriers, and Standard Plastic 300-m il DIPs OE C TOP VIEW

Q7910

Abstract: SN74ALS2232A
Contextual Info: SN74ALS2232A 64 x 8 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY D3091, F E B R U A R Y 1988 - R E V IS E D M A R C H 1990 Independent Asynchronous Inputs and Outputs NT PA C K A G E ITO P VIEW [ DOC D1 C D2C D3C 64 Words by 8 Bits rst Data Rates from 0 to 40 MHz

TLC320AD65C

Contextual Info: TLC320AD65C 16-BIT SIGMA-DELTA STEREO CODEC XLAS099 - MAY 1995 Single 5-V Power Supply Stereo 16-Bit Slgma-Delta Audio Converter Fully Independent Analog Input Capture and Playback Mixing Capability General Purpose 16-Bit Signal Processing Mono Channel Input

C3452

Abstract: C3450
Contextual Info: MC3450, MC3452 QUADRUPLE DIFFERENTIAL LINE RECEIVERS D 300 6, FEB R U A R Y 1986 • • Four Independent R eceivers with Common Enable Input TO P V IEW ! High Input Sensitivity . . . 2 5 mV Max i b 1A • High Input Impedance • M C 3 4 5 0 has Three-State Outputs

Contextual Info: SN54HCT652, SN74HCT652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS _S C L S 1 7 9 A - MARCH 1 9 6 4 - REVISED JANUARY 1906 • Inputs Are TTL-Voltage Compatible • Independent Registers and Enables for A and B Buses •

Contextual Info: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C - FEBRUARY 1993 - REVISED FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Input-Ready, Output-Ready, and Half-Full Flags

Contextual Info: UT54ACS 169/UT54ACTS 169 Radiation-Hardened 4-Bit Up-Down Binary Counters FEATURES • • • • • • • • • • Fully synchronous operation for counting and programming Internal look-ahead for fast counting Carry output for n-bit cascading Fully independent clock circuit

Contextual Info: SN74ALS229B 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SPAS09Q - MARCH 1990 - REVISED JUNE 1992 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits • Data Rates From 0 to 40 MHz • Fall-Through Time. . . 14 ns "typ • 3-State Outputs

ta31087

Contextual Info: REGULATOR AND PERIPHERAL TENTATIVE DATA SYSTEM REGULATOR 1C FOR CORDLESS TELEPHONE 2 independent regulators and m icrocom puter pow er on a chip, very suitable fo r a handset o f cordless telephone. FEATURES • W atch-dog-tim er fun ction • 2 independent regulators

ic TC4066BP

Abstract: TC4066BP
Contextual Info: TC4066BP/BF C 2MOS DIGITAL IN T E G R A T E D CIR C U IT S IL IC O N M O N O L IT H IC TC4066BP/TC4066BF QUAD BILATERAL SWITCH TC4066BP/BF contains four independent circuits of bidirectional switches. When control input CONT is set to "H" level, the impedance between input and

TC40117BP

Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T C 4 0 1 1 7 B P TC40117BP PROGRAMMABLE D UAL 4 - B I T TER M IN A T O R TC40117BP contains independent two 4-bit Pragrammable Terminators that are capable of terminating a data bus to a high or low state. They can also terminate any

Contextual Info: SN74ACT2235 1024x9x2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS148E - DECEMBER 1990 - REVISED APRIL 1998 • Independent Asynchronous Inputs and Outputs • Access Times of 25 ns With a 50-pF Load • Data Rates up to 50 MHz • Low-Power Advanced CMOS Technology

Contextual Info: UT54ACS 169/UT54ACTS 169 Radiation-Hardened 4-Bit Up-Down Binary Counters FEATURES PIN O U T S • Fully synchronous o p eratio n for counting and pro­ gram m ing • Internal look-ahead for fast counting • Carry output for n-bit cascading • Fully independent clock circuit

Contextual Info: TO SHIBA 1SS384 TO SHIBA DIODE 1 SS384 SILICON EPITAXIAL SCHOTTKY BARRIER TYPE Unit in mm LO W VOLTAGE HIGH SPEED SW ITCHING 2.1 ± 0.1 j 1.25± O.lj • Small Package • Composed of 2 independent diodes. • Low Forward Voltage : Vp 2 = 0.23V (TYP.) o o

652 HE

Abstract: 74AS651
Contextual Info: TYPES SN54ALS651 THRU SN54ALS654, SN54AS651, SN54AS652 SN74ALS651 THRU SN74ALS654. SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS D 2 6 6 1 . DECEMBER 1 9 8 3 • Bus Transceivers/Registers • Independent Registers and Enables for A and B Buses

SN54LS654

Contextual Info: TYPES SN54LS651 THRU SN54LS654 SN74LS651 THRU SN74LS654 OCTAL BUS TRANSCEIVERS AND REGISTERS 02637, JA N U A R Y ' • Bus Transceivers/Registers 19 81 - R E V IS E D DECEMBER 1983 S N 54LS ' . . . JT PACKAGE S N 74LS ' . . . D W , JT OR N T PACKAG E Independent Registers and Enables for A and

74als2238

Contextual Info: SN74ALS2238 32 x 9 x 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY D3501, A P R IL 1990 N PACKAQE TOP VIEW Independent Asychronous Input« and Outputs Bidirectional RSTK 32 Word« by 9 BK. Each * Data Rate« from 0 to 40 MHz * F a ll-T h ro u g h T im e . . . 2 2 n « iy p

Contextual Info: TOSHIBA HN2D01F TOSHIBA DIODE SILICON EPITAXIAL PLANAR TYPE HN2D01F ULTRA HIGH SPEED SWITCHING APPLICATION. Unit in mm • HN2D01F is composed of 3 independent diodes. + 0.2 2.8 - 0.3 • Low Forward Voltage 1 . 6 - 0.1 • Fast Reverse Recovery Time : trr= 1.6ns Typ.

Contextual Info: TYPES SN54ALS646 THRU SN54ALS649, SN54AS646, SN54AS648 SN74ALS646 THRU SN74ALS649, SN74AS646, SN74AS648 OCTAL BUS TRANSCEIVERS AND REGISTERS D 2 6 6 1 . DEC EM BE R 1 9 8 2 -R E V IS E D DEC EM BE R 1 9 8 3 • Independent Registers for A and B Buses • Multiplexed Real-Time and Stored Data

4502BP

Abstract: TC4502BP 4502B
Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4502BP TC4502BP STROBED HEX INVERTER/BUFFER The T C 4 5 0 2 B P is a strobed h e x i n v erter/buffer w ith 3-state output. W h e n D I S A B L E input is set to "H" level, six o u t p u ts b e come high impedance independently