IN6 16A Search Results

samsung tcon

Abstract: SAMSUNG T-CON 16-Analog
Contextual Info: KAD0816/KAD0817 CMOS INTEGRATED CIRCUITS 8-BIT ^-COMPATIBLE A/D CONVERTERS WITH 16-CHANNEL MULTIPLEXER The KAD0816/KAD0817 Analog-to-Digital Converter is a Monolithic Silicon gate CMOS Device with 8-bit resolu­ tion, it is a 16-channel input m ultiplexer and micro­

Si533x

Abstract: AN408 AN4087 50 Ohm Termination Texas independent termination "50 Ohm" si5330 data sheet si5338 Si5356 AN360 Si5334
Contextual Info: AN408 TERMINATION O P T I O N S FOR A NY - F R E QUE N C Y, A N Y - O UTPUT C LOCK G ENERATORS A N D C LOCK B UFFERS 1. Introduction This application note provides termination recommendations for connecting input and output clock signals to the Si533x and Si5356/55 family of timing ICs and is not applicable to any other Silicon Labs devices.

Contextual Info: AN408 TERMINATION O P T I O N S FOR A NY - F R E QUE N C Y, A N Y - O UTPUT C LOCK G ENERATORS A N D C LOCK B UFFERS 1. Introduction This application note provides termination recommendations for connecting input and output clock signals to the Si533x and Si5356/55 family of timing ICs and is not applicable to any other Silicon Labs devices.

MAX3232CSE

Abstract: TS1117CW-adj in6 16a TLE6250GV33 sot245 AMIS30663 lg r40 RXD TXD MP3 PIN36 LTC1326CS8
Contextual Info: 1 2 3 4 5 6 7 8 Pin[1.64] C43 10nF JP27, JP28 default 1-2 Pin56 P32 D3 12 9 11 10 SOT2 N1 D4 Pin57 P33 LG T679-CO green GND JP27 Pin10 6 JP1 C4 100nF 15 LG T679-CO green D5 Pin58 P34 D6 LG T679-CO green D7 LG T679-CO green JP4 Reset UART A/B Default: open

MAX3232CSE

Abstract: PCA82C250 in6 16a 3.gnd 7.vcc dip-8 TXD RXD RXD TXD MP3 D9 female JP32 LTC1326CS8
Contextual Info: D C B GND Pin24 Pin27 Pin30 Pin33 Pin36 Pin39 Pin42 Pin56 Pin59 Pin16 Pin53 Pin9 Pin12 Pin15 Pin63 Pin5 Pin8 VPin19 VPin20 Pin21 Pin45 MCUVCC GND Pin44 2 4 1 D15 1N4002 D19 C-Pin X16 C22 22pF C16 22pF 2 Q1 4MHZ Default: 1-4 C40 47µF/25V VBat C61 4,7µ Pin47

MB96F350

Abstract: MAX3232CSE SOT-24 680r Lg R40 PIN32
Contextual Info: 1 2 3 4 5 6 7 8 Pin[1.64] D4 Pin57 P33 6 JP1 C4 100nF 15 LG T679-CO green D5 Pin58 P34 D6 LG T679-CO green D7 LG T679-CO green JP4 Reset UART A/B Default: open 1k socketed D8 1 C8 100nF 3 Pin34 JP6 UART B SIN3 Pin35 JP8 UART B SOT3 12 9 11 10 VCC 6 10k

MAX3232CSE

Abstract: MB96F350 TLE7259 MB96F AMIS30663 D9 female JP32 PCA82C250 RXD TXD MP3 MB96F3
Contextual Info: D C B GND Pin24 Pin27 Pin30 Pin33 Pin36 Pin39 Pin42 Pin56 Pin59 Pin16 Pin53 Pin9 Pin12 Pin15 Pin63 Pin5 Pin8 VPin19 VPin20 Pin21 Pin45 MCUVCC GND Pin44 2 4 1 D15 1N4002 D19 C-Pin X16 C22 22pF C16 22pF 2 Q1 4MHZ Default: 1-4 C40 47µF/25V VBat C61 4,7µ Pin47

con40

Abstract: MAX3232CSE TLE6250G an17 c33 SCK2R VG96 PIN31 PIN28 PIN40
Contextual Info: 1 2 3 4 5 6 7 8 VCC Pin[1.80] VCC GND X4 CON40 Pin80 Pin79 Pin78 Pin77 Pin76 Pin75 Pin74 Pin73 Pin72 Pin71 Pin70 Pin69 Pin68 Pin67 Pin66 Pin65 Pin64 Pin63 Pin62 MCUVCC GND Pin80 Pin79 Pin78 Pin77 Pin76 Pin75 Pin74 Pin73 Pin72 Pin71 Pin70 Pin69 Pin68 Pin67

R36A

Abstract: MAX3232CSE sot245 1N4002 240R TS1117CW-ADJ VG96 JP44 78C51 D1378
Contextual Info: 1 2 3 4 5 6 7 Pin[1.100] 8 VCC VCC GND X4 Pin54 Pin53 Pin52 GND R15 10k 4 GND VCC C45 10n C47 10n C59 10n C20 10n 6 VCC C5 100n 15 1N4148 VCC VCC VCC R4 10k Pin71 INT1_R JP12 R24 10k Pin15 TTG0 JP14 R5 10k R6 10k R7 10k R8 10k SW1 SW1 1k Default: closed INT1_R

an17 c33

Abstract: CON50 VG96 B9451 lg r50
Contextual Info: 6 7 D1 C D2 LG T679-CO green Pin11 JP2c UARTA945/0 D3 C43 10nF Pin60 JP1a UARTA340/0 N1 D4 LG T679-CO green Pin9 Pin81 P04 JP4 Reset UART A/B D6 MCUVCC LG T679-CO green AVCC Default: closed D7 LG T679-CO green Subclk C17 22pF C18 1µ GND D8 LG T679-CO green

SMD A18a

Abstract: typs of SRAM RTC-8563 Funkamateur 82C251 SMD diode 18b 5c analoge schaltkreise
Contextual Info: phyCORE-ADuC812 Hardware-Manual Ausgabe Oktober 2001 Ein Produkt eines Unternehmens der PHYTEC Technologie Holding AG phyCORE-ADuC812 Im Buch verwendete Bezeichnungen für Erzeugnisse, die zugleich ein eingetragenes Warenzeichen darstellen, wurden nicht besonders gekennzeichnet.

upd42101

Abstract: PD42101 ZXd 27
Contextual Info: NEC jn P D 4 2 1 0 1 Line Buffer for NTSC TV NEC Electronics Inc. Description Pin Configuration The jiPD42101 is a 910-word by 8-bit line buffer fabri­ cated with a CMOS siiicon-gate process. The device helps to create an NTSC flicker-free television picture

7MA1400014

Abstract: XC2C128-7VQG100I c8051 microcontroller j817 CPLD Si5368 Si53xx DS2411P div-43 Si5365
Contextual Info: S i 5 3 6 5 / 6 6 - E VB S i 5 3 6 7 / 6 8 - E VB Si5365/66/67/68 E VALUATION B OA RD U SER ’ S G UIDE 1. Introduction The Si5365/66-EVB and Si5367/68-EVB provide platforms for evaluating Silicon Laboratories' Si5365/Si5366 and Si5367/Si5368 Any-Rate Precision Clocks. The Si5365 and Si5366 are controlled directly using configuration pins

Contextual Info: Si5365/66-EVB Si5367/68-EVB Si5369-EVB Si5365/66/67/68/69 E VALUATION B OA RD U SER ’ S G U ID E 1. Introduction The Si5365/66-EVB,Si5367/68-EVB, and Si5369-EVB provide platforms for evaluating Silicon Laboratories' Si5365/Si5366, Si5367/Si5368, and Si5369 Any-Frequency Precision Clocks. The Si5365 and Si5366 are

SMD A18a

Abstract: DS2401 G100 RTC-8563 uc005 Philips SJA1000 standalone CAN dual 7 segment led display dual 7 segment display 31D DIODE
Contextual Info: phyCORE-591ADuC812 Hardware Manual Edition August 2006 A product of a PHYTEC Technology Holding company phyCORE-591AduC812 In this manual are descriptions for copyrighted products that are not explicitly indicated as such. The absence of the trademark and copyright ( ) symbols

SMD A18a

Abstract: RS485 to db9 pinout DS2401 RTC-8563 rs485 transciever cable ic power 22D regulator
Contextual Info: phyCORE-ADuC812 Hardware Manual Edition October 2001 A product of a PHYTEC Technology Holding company phyCORE-AduC812 In this manual are descriptions for copyrighted products that are not explicitly indicated as such. The absence of the trademark  and copyright () symbols

AMIS30663

Abstract: SK9633 sub-d 9 pin
Contextual Info: D C B A X20A 2x9 Header 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 X20B 2 2x9 Header 3 4 5 6 7 8 9 MCUVCC 10 11 12 C5 13 10n 14 15 GND 16 17 18 1 2 MCUVCC 3 4 5 C11 6 10n 7 8 GND 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

TC55VBM416

Contextual Info: D C B A X20A 2x9 Header 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 X20B 2 2x9 Header 3 4 5 6 7 8 MCUVCC 9 10 11 C5 12 10n 13 14 GND 15 16 17 DVCC 18 1 2 C7 3 10n 4 5 DVSS 6 7 8 9 DVCC 10 11 12 C9 13 10n 14 15 DVSS 16 17 18 MCUVCC 19 20 21 C11 22 10n

AMIS30663

Abstract: 8j1a al p06
Contextual Info: 1 2 3 4 5 6 7 8 A A B B SK-96380-120PMT_p01 SK-96380-120PMT_p01 SK-96380-120PMT_p02 SK-96380-120PMT_p02 SK-96380-120PMT_p03 SK-96380-120PMT_p03 C C D D 1 2 3 4 5 6 7 Title: SK-96380-120PMT Drawn by: Date: Sheet: File: C.Harders 10/11/2006 of 3 SK-96380-120PMT.SchDoc

MPR 55 F resistor ceramic

Abstract: smd diode marking A35 NAC0010A
Contextual Info: LM4050QML www.ti.com SNVS627F – JUNE 2010 – REVISED APRIL 2013 LM4050QML Precision Micropower Shunt Voltage Reference Check for Samples: LM4050QML FEATURES APPLICATIONS • • • • • • • • • • 1 2 Low Dose Rate Qualified 100 krad Si SEFI Immune

GPC® 150

Abstract: Manuale Tecnico GPC®-150 DISPLAY alfanumerico schema Lcd monitor dell schema elettrico auto zilog z80 microprocessor family 4 LT 16 Futaba display dell motherboard schematic memoria 128k x 8
Contextual Info: GPC 150 General Purpose Controller Z84C15 MANUALE TECNICO Via dell' Artigiano, 8/6 ® 40016 San Giorgio di Piano grifo Bologna ITALY E-mail: grifo@grifo.it http://www.grifo.it http://www.grifo.com Tel. +39 051 892.052 (r.a.) FAX: +39 051 893.661 ® GPC 150

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM for HYPER DIMM EDE2508AASE-DF, -BE, -AE 32M words x 8 bits EDE2516AASE-DF, -BE, -AE (16M words × 16 bits) Description Features The EDE2508AA is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks.

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM for HYPER DIMM L EO EDE2508AASE-DF, -BE, -AE 32M words x 8 bits EDE2516AASE-DF, -BE, -AE (16M words × 16 bits) Features The EDE2508AA is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks.

IN17A

Contextual Info: <<Contents>> <<Index>> General Specifications ARM15A, ARM55, ARS15B, ARS15M, ARS55M Relay Boards for FIO GS 33K50H60-50E [Release 5]  GENERAL This document describes the specifications of relay board used in FIO subsystem of CENTUM VP. Relay input/