IMS PROCESSOR Search Results

T425

Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal

Inmos t805

Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

D4205

Abstract: inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212
Contextual Info: Chapter 2 9 □ mos IMS D7205 IMS D6205 IMS D5205 IMS D4205 0 C C 3 IT I 2 Toolset Product Information occam cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Occam compiler for INMOS transputer family of processors

inmos T414

Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM

QIC-11

Abstract: inmos IMS-B017 IMSB008 PC-9801 XT motherboard
Contextual Info: Chapter 13 D mos* 127 IMS S217 IMS S308 IMS S514 IMS S708 Device drivers & motherboard support software Product Information KEY FEATURES • Host device drivers • INMOS server program plus sources • Tool for mapping transputer networks • Support for INMOS development systems

Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support

AD T805

Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

XT8380S

Abstract: ST296N ST2383N ST4350N maxtor lxt200s ST125N ST4766N IMSB404 IMS B404 seagate ST01
Contextual Info: Chapter 10 93 IMS F002B SCSI libraries □ Product Information A software support package for the IMS B422 SCSI TRAM KEY FEATURES • Connection of SCSI Small Computer System Interface peripheral devices to transputer applications. • O c c a m 2 and ANSI C toolset compatible (IMS Dx205 and IMS Dx214).

T400 600

Abstract: IMS T414
Contextual Info: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM

inmos m212 disk processor

Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
Contextual Info: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite

T800 transputer

Abstract: QIC-24
Contextual Info: Chapter 5 □ cmmos 43 IMS D7216 IMS D6216 IMS D5216 IMS D4216 ANSI FORTRAN 77 Toolset Advance Information ANSI FORTRAN 77 cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI FORTRAN 77 ANSI X3.9 -1978 •

inmos transputer reference manual

Abstract: VME 6340 ibm at motherboard 80286 IMSB404 D4217 D5214 IMS B404
Contextual Info: 35 C hapter 4 cCass constructors Donmos- IMS IMS IMS IMS D7217 D6217 D5217 D4217 C ~\— b □ Product Information C + + native and transputer cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Conformance with the C + + 2.0 specification

CQ 2AF1

Abstract: IMST425 IMS T400 Inmos T222
Contextual Info: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal

specifications of tdr

Abstract: Inmos t805 IMS processor
Contextual Info: SGS-THOMSON IMS T805 ’H E S m M M 32-bit floating-point transputer FEATURES • ■ ■ 32 bit architecture 40 ns internal cycle tim e 25 M IPS peak instruction rate ■ 3.6 M flops (peak) instruction rate ■ Pin co m patible w ith IMS T800, IMS T425, IMS T400

Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

inmos T414

Abstract: IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414
Contextual Info: Chapter 17 149 IMS B401 TRAM 32-bit transputer 32 Kbytes Size 1 □ m os Engineering Data Reset Analyse-NotError ^ o /j- IMS T800 LinkO -«- h * or Linkl - - H , IMS T425 32 Kbytes SRAM Link2 Link3. Terminated links FEATURES GENERAL DESCRIPTION

B-428

Contextual Info: Chapter 22 181 IMS B428 32-bit transputer 2 Mbytes Size 2 TRAM mos Engineering Data Reset Refresh control Analyse <h NotError LinkO - Address IMS T801 L in kl - I Data Link2 L¡nk3 - 4 1 Subsystem port FEATURES IMS T801 Transputer with non-multiplexed buses

sbl 20100

Abstract: T425-X25S MEMAD11 inmos transputer T425
Contextual Info: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414

adtron

Abstract: IXP2850 Rittal IOP321 MPCMM0001 adtron ea8r NetStructure EM64T ZNYX Networks IP multimedia IMS
Contextual Info: 9667FN01.qxd 3/27/06 10:18 AM Page C1 Application Note Telecom Accelerating Deployment of IP Multimedia Subsystems IMS IMS Telco Server Proof of Concept 9667FN01.qxd 3/27/06 10:18 AM Page C2 Application Note Accelerating Deployment of IP Multimedia Subsystems (IMS)

inmos transputer T425

Abstract: T800 B411-8 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411
Contextual Info: Chapter 20 167 IMS B411 TRAM 3 2 -b it transputer 1 Mbyte Size 1 oímos Engineering Data Reset • Analyse NotError - — < IMS T800 or 1 Mbyte LinkO - >| Linkl IMS T425 DRAM -I Link2 - -Link3 J -Terminated links FEATURES GENERAL DESCRIPTION

IMST414

Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425

EIA-343

Abstract: G300B B-419 g300 video b419
Contextual Info: Chapter 30 243 I M S B 4 1 9 Integrated graphics TRAM Size 6 OinimOS' Engineering Data FEATURES GENERAL DESCRIPTION • The IMS B419 incorporates the IMS G300B Co­ lour Video Controller CVC with the IMS T800 32 bit Floating Point Transputer to form a high per­

T800 transputer

Abstract: T800 INMOS T800 2512 package resistor dimensions details Inmos inmos static ram
Contextual Info: Chapter 25 203 IMS B427 mos 32-bit transputer 8 Mbytes Size 2 TRAM Engineering Data FEATURES GENERAL DESCRIPTION • 25MHz IMS T800 Transputer • 8 Mbyte of one wait-state DRAM 160 ns memory cycle time The IMS B427 Is a compact size 2 TRAM offering 8Mbytes of 4-cycle DRAM and subsystem

inmos T400

Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
Contextual Info: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425