IMAGE CONVOLUTION FILTER Search Results

linear image sensor

Abstract: c code for convolution linear convolution low pass filter circuit 741 image processing 12 line ccd scanner 2 way lighting circuit 741 OP Amp Brain wave signal sensor CCD linear array
Contextual Info: CHAPTER 24 Linear Image Processing Linear image processing is based on the same two techniques as conventional DSP: convolution and Fourier analysis. Convolution is the more important of these two, since images have their information encoded in the spatial domain rather than the frequency domain. Linear filtering can

pj8d

Contextual Info: TMC2255 TMC2255 CMOS 3 x 3,5 x 5 Image Convolver 8x8 Bits, 12 MHz Data Rate Description Like the faster TMC2250, the low cost TMC2255 can perform a triple 3x1 matrix-vector multiplication or a 3x3 convolution. It can also perform a 5x5 convolution with bidimensionally symmetrical coefficients. The on-chip

xnxx

Abstract: 0X000XXX TMC2011 TMC2250 TMC2255 TMC2302 TTXX trw mpy 16
Contextual Info: TMC2255 C M O S 3x3,5x5 Image Convolver 8 x 8 B its , 1 2 M H z D a ta R a te Like the faster TMC2250, the low cost TMC2255 can perform a triple 3x1 matrix-vector multiplication or a 3x3 convolution. It can also perform a 5x5 convolution with bidimensionally symmetrical coefficients. The on-chip

Contextual Info: TMC2255 CMOS 3x3,5x5 Image Convolver 8 x 8 B it s , 1 2 M H z D a t a R a t e Like the faster TMC2250, the low cost TMC2255 can perform a triple 3x1 matrix-vector multiplication or a 3x3 convolution. It can also perform a 5x5 convolution with bidimensionally symmetrical coefficients. The on-chip

Contextual Info: TMC2255 TMC2255 CMOS 3 x 3,5 x 5 Image Convolver 8 x 8 B it s , 1 2 M H z D a t a R a t e Description Like the faster TMC2250, the low cost TMC2255 can perform a triple 3x1 matrix-vector multiplication or a 3x3 convolution. It can also perform a 5x5 convolution with

Contextual Info: LF2301 Image Resam pling Sequencer □ 40 M H z Clock Rate □ H igh-Speed Im age M anipulation □ M aximum Image Size: 40% x 4096 Pixels □ Supports F ollow ing Interpolation Algorithms: • Nearest-Neighbor • Bilinear Interpolation • Cubic Convolution

4x4 bit multipliers

Abstract: AC84 JAN1997 PDSP16488 PDSP16488A
Contextual Info: PDSP16488A MA PDSP16488A MA Single Chip 2D Convolver with Integral Line Delays DS3742 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a

IMSA110

Abstract: IMSA110-G20S PGA100
Contextual Info: IMSA110 IMAGE AND SIGNAL PROCESSING SUB–SYSTEM 1-D/2-D SOFTWARE CONFIGURABLE CONVOLVER/FILTER ON-CHIP PROGRAMMABLE LINE DELAYS 0 — 1120 STAGES 8-BIT DATA AND 8.5-BIT COEFFICIENT SLICE 21 MULTIPLY-AND-ACCUMULATE STAGES 1-D (21) OR 2-D (3 x 7) CONVOLUTION WINDOW

convolver

Abstract: AC84 PDSP16488 PDSP16488A CE5 marking
Contextual Info: PDSP16488A Single Chip 2D Convolver with Integral Line Delays Advance Information DS3713 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of

Contextual Info: PDSP16488A Single Chip 2D Convolver with Integral Line Delays Advance Information DS3713 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of

marking code 41S

Abstract: C16C3
Contextual Info: PDSP16488A Single Chip 2D Convolver with Integral Line Delays Advance Information DS3713 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of

window comparator

Abstract: AC84 PDSP16488 PDSP16488A
Contextual Info: PDSP16488A Single Chip 2D Convolver with Integral Line Delays Advance Information DS3713 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of

IMSA110-G20S

Abstract: IMSA110S IMSA110 PGA100 A11004
Contextual Info: IMSA110 IMAGE AND SIGNAL PROCESSING SUB–SYSTEM 1-D/2-D SOFTWARE CONFIGURABLE CONVOLVER/FILTER ON-CHIP PROGRAMMABLE LINE DELAYS 0 — 1120 STAGES 8-BIT DATA AND 8.5-BIT COEFFICIENT SLICE 21 MULTIPLY-AND-ACCUMULATE STAGES 1-D (21) OR 2-D (3 x 7) CONVOLUTION WINDOW

psri

Abstract: a110 IMSA110 IMSA110-G20S PGA100 A11007
Contextual Info: IMSA110 IMAGE AND SIGNAL PROCESSING SUB–SYSTEM 1-D/2-D SOFTWARE CONFIGURABLE CONVOLVER/FILTER ON-CHIP PROGRAMMABLE LINE DELAYS 0 — 1120 STAGES 8-BIT DATA AND 8.5-BIT COEFFICIENT SLICE 21 MULTIPLY-AND-ACCUMULATE STAGES 1-D (21) OR 2-D (3 x 7) CONVOLUTION WINDOW

C2250

Abstract: Marking KA3 MC22
Contextual Info: TMC2250 TMC2250 Matrix Multiplier 1 2 x 1 2 Bits, 40 MHz Description The TMC2250 is a flexible high-performance ninemultiplier array VLSI circuit which can execute a cascadeable 9-tap FIR filter, a cascadeable 4 x 2 or 3 x 3-pixel image convolution, or a 3 x 3 color space

ka3 L5

Abstract: kbs 3AB 3x3 matrix MARKING 09F rgb f13 TMC2250 ka111 277 kb3
Contextual Info: TMC2250 TR w Y Matrix Multiplier 1 2 x 1 0 Bits, 4 0 M H z The TM C2250 is a flexible high-performance ninemultiplier array VLSI circuit which can execute a cascadeable 9-tap FIR filter, a cascadeable 4 x 2 or 3 x 3-pixel image convolution, or a 3 x 3 color space

C708A

Abstract: K3217 k2388 TMC2250 TMC2255 E70 format 3x3 bit parallel multiplier marking p4 a7 3x3
Contextual Info: www.fairchildsemi.com TMC2255 CMOS 3 x 3, 5 x 5 Image Convolver 8 x 8 Bits, 12 MHz Data Rate Features Applications • • • • • • • • • • • • • 8-bit data and coefficient input precision Triple 3x1 matrix-vector multiplication mode 3x3 and 5x5 two-dimensional convolution modes

Contextual Info: P • I L E S ¡ S E Y SEM IC O N D U C TO R S ; P D S P 16488 SINGLE CHIP 2D CONVOLVER WITH INTEGRAL LINE DELAYS The PDSP16488 is a fully integrated, application spe­ cific, image processing device, ft performs a two dimensional convolution between the pixels within a video window and a

PDSP16488co

Abstract: PDSP16488 4x4 bit binary multiplier 4x4 bit multipliers DIODE JSu DIODE marking ED X9 PDSP16256 PDSP16340 PDSP16401 PDSP16510
Contextual Info: P • l i E S S E Y S E M IC O N D U C T O R S P D S P 1 6 4 8 8 SINGLE CHIP 2D CONVOLVER WITH INTEGRAL LINE DELAYS The PDSP16488 is a fully integrated, application spe­ cific, image processing device, ft performs a two dimensional convolution between the pixels within a video window and a

median Filter

Abstract: adsp-210XX FIR FILTER implementation in c language ADSP filter algorithm implementation c code for convolution convolution of two matrices diode r4 implementation of data convolution algorithms ADSP-21000 convolution implementation in c language
Contextual Info: Image Processing 9 Graphics and imaging are two-dimensional applications. Just as in the one-dimensional case, it is often desirable to manipulate the data through filtering. This chapter describes the implementation of two-dimensional filtering using 3 x 3 kernals, as well as median filtering. Histogram

Smart Core Z2

Abstract: implementation of data convolution algorithms in c code for convolution NM6403 TMS320C8X implementation of data convolution algorithms convolution implementation in c language wj m12
Contextual Info: Effective Implementation of Convolution Filters on NeuroMatrix Core Vitali Kashkarov th Research Center MODULE, 3 Eight March 4 Street, Box 166, Moscow, 125190, Russia, tel. +7-095-152-9802, fax. +7-095-152-4661, e-mail: vkash@module.ru 1. INTRODUCTION Digital signal processing technologies boosting

HSP48901

Abstract: HSP48901JC-30
Contextual Info: HSP48901 Data Sheet July 2004 FN2459.6 3 x 3 Image Filter Features The Intersil HSP48901 is a high speed 9-Tap FIR Filter which utilizes 8-bit wide data and coefficients. It can be configured as a one-dimensional 1-D 9-Tap filter for a variety of signal processing applications, or as a two

HSP9500

Abstract: HSP48901 HSP48901GC-20 HSP48901GC-30 HSP48901JC-20 HSP48901JC-30
Contextual Info: HSP48901 TM Data Sheet May 1999 FN2459.5 3 x 3 Image Filter Features The Intersil HSP48901 is a high speed 9-Tap FIR Filter which utilizes 8-bit wide data and coefficients. It can be configured as a one dimensional 1-D 9-Tap filter for a variety of signal processing applications, or as a two

HSP48901

Abstract: HSP48901GC-20 HSP48901GC-30 HSP48901JC-20 HSP48901JC-30
Contextual Info: HSP48901 Data Sheet May 1999 File Number 3 x 3 Image Filter Features The Intersil HSP48901 is a high speed 9-Tap FIR Filter which utilizes 8-bit wide data and coefficients. It can be configured as a one dimensional 1-D 9-Tap filter for a variety of signal processing applications, or as a two