IDT77V011 Search Results

mbus

Abstract: SK 8022 ace dsc hen nu SM 8002 C
Contextual Info: IDT77V011 DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). Ideal for xDSL DSLAM and 25Mbps switching applications.

77V011

Abstract: 77V400 IDT77011 IDT77V011 IDT77V400 IDTV400 intel 8008 cpu
Contextual Info: IDT77V011 Data Path Interface DPI to Utopia Level 2 Translation Device )HDWXU WXUHV ‹ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). ‹ Ideal for xDSL DSLAM and 25Mbps switching applications. ‹ Supports ATM Forum UTOPIA Level 2 interface in both 8-bit

IDT77V011

Abstract: IDT77V400 IDT77V500 DSLAM configuration
Contextual Info: ADVANCED INFORMATION IDT77V011 DATA PATH INTERFACE DPI TO UTOPIA 2 TRANSLATION DEVICE Integrated Device Technology, Inc. FEATURES • Single chip interface between multiple PHYs and a single Data Path Interface (DPI). • Ideal for xDSL DSLAM and 25Mbps switching applications.

Contextual Info: ADVANCED INFORMATION IDT77V011 DATA PATH INTERFACE DPI TO UTOPIA 2 TRANSLATION DEVICE lìts g is te d D evjce Technology, Inc. FEATURES • • • • • • • • Single chip interface between multiple PHYs and a single Data Path Interface (DPI). Ideal for xD SL DSLAM and 25M bps sw itching applications.

Contextual Info: IDT77V011 Data Path Interface DPI to Utopia Level 2 Translation Device )HDWXU WXUHV ‹ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). ‹ Ideal for xDSL DSLAM and 25Mbps switching applications. ‹ Supports ATM Forum UTOPIA Level 2 interface in both 8-bit

itt 8017

Abstract: 77V011 77V400 800B 800E 801C IDT77V011 IDT77V400 intel 8008 cpu
Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE F ea tu re s PRELIMINARY IDT77V011 ♦ Supports cell sizes from 52 to 56 bytes on the DPI interface. ♦ Supports DPI operation up to 50MHz. ♦ Either Utility Bus or Parallel Manager Management interface for

77V011

Abstract: FWZ9929G IDT77V011
Contextual Info: IDT77V011 Device Errata Notes Supplemental Information The revision of the 77V011 can be determined visually from the date code shown on the top marking. The date code is the third line of text. ∫ Data Code dt 77V011 L155DA FWZ9929G The revision is also stored in the Device ID register at address 0x8000.

77V011

Abstract: 77V400 800B 800E 801C CRC-10 IDT77V011 IDT77V400
Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). Ideal for xDSL DSLAM and 25Mbps switching applications. Supports ATM Forum UTOPIA Level 2 interface in both 8-bit and 16bit modes.

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). Ideal for xDSL DSLAM and 25Mbps switching applications. Supports ATM Forum UTOPIA Level 2 interface in both 8-bit and 16bit modes.

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for DSLAM designs utilizing SWITCHStAR where full header access is needed. Supports VPI Tunneling

6AD5

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network side of SWITCHStAR DSLAM designs where full header access is needed. Supports VPI Tunneling

Contextual Info: 1.2 Gbps 8 port ATM Switch IDT SwitchBIOS Programmer’s Guide Revision 4.0.1 Date 4/28/1999 Table of Contents Chapter 1 INTRODUCTION. 4 1.1 Data Path Overview. 4

77V400

Abstract: 77V500 IDT77500 IDT77V011 IDT77V012 IDT77V400 IDT77V500 V400 OD031
Contextual Info: Page 1 of 35 Application Note 258 SwitchStar Cell-Bus Operation with 2.5Gbps ATM Switch Example SwitchStar Cell-Bus The SwitchStar Cell-Bus mode enables multiple SwitchStar chipsets to be combined in a scalable architecture to provide greater bandwidth than a single chipset. Individually,

77V011

Abstract: 77V012 IDT77010 IDT77252 IDT77V011
Contextual Info: 1.2 Gbps 8 port ATM Switch IDT SWDEMO Users Manual Revision 4.0.1 Date 4/27/1999 Table of Contents Chapter 1 SWDEMO Users Guide. 5 1.1 SWDEMO Hardware and Driver Selection. 5

intel 8008 cpu

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). Ideal for xDSL DSLAM and 25Mbps switching applications. Supports ATM Forum UTOPIA Level 2 interface in both 8-bit and 16bit modes.

6116 memory

Abstract: memory 6116 6116 datasheet 6116 Recent Datasheet download IDT77010 IDT77V011 IDT77V012 IDT77V400 IDT77V500
Contextual Info: SECTION 6 Appendix SWITCHStAR product data sheets, documentation for the Data Path Interface, and other SWITCHStAR support device data sheets are provided here as reference information. Some of these documents contain device specifications such as timing parameters and DC specifications which may change over time, and it is

Contextual Info: IDT77V012 Data Path Interface DPI to UTOPIA Level 1 Header Translation Device )HDWXU WXUHV /LVW ‹ Utility bus interface for programming PHY devices ‹ Single +3.3V ± 0.3V power supply required ‹ Inputs are +5.0V tolerant ‹ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network

6AD5

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 1 HEADER TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network side of SWITCHStAR DSLAM designs where full header access is needed. Supports VPI Tunneling

Contextual Info: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 Phone #: 408 727-6116 Fax #: (408) 727-2328 Errata Notification EN #: IEN01-04 Issue Date: December 14, 2001 Product Affected: Errata Revision #: 10/22/01 Effective Date: October 22, 2001

CRM1076

Abstract: BFG64 ablestik 8360 ICS8430EY EME-G700 Transistor BC 1078 IDT82V2058XDA Compound EME-G700 CRM1525D IDT75N43102S50BCG
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: A0610-02 Product Affected: Date Effective: Contact: Title: Phone #: Fax #: E-mail: DATE: 16-Oct-2006 MEANS OF DISTINGUISHING CHANGED DEVICES:

77V012

Abstract: IDT77155 IDT77V012 IDT77V400 DATA026
Contextual Info: IDT77V012 Data Path Interface DPI to UTOPIA Level 1 Header Translation Device )HDWXU WXUHV /LVW ‹ Utility bus interface for programming PHY devices ‹ Single +3.3V ± 0.3V power supply required ‹ Inputs are +5.0V tolerant ‹ 8, 12, 24, 28 or 32-bit ATM header lookup. Ideal for network

intel 8008

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). Ideal for xDSL DSLAM and 25Mbps switching applications. Supports ATM Forum UTOPIA Level 2 interface in both 8-bit and 16bit modes.

TBL27

Contextual Info: DATA PATH INTERFACE DPI TO UTOPIA LEVEL 2 TRANSLATION DEVICE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip interface between multiple UTOPIA PHYs and a single Data Path Interface (DPI). Ideal for xDSL DSLAM and 25Mbps switching applications. Supports ATM Forum UTOPIA Level 2 interface in both 8-bit and 16bit modes.

philips diode PH 33J

Abstract: UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY
Contextual Info: QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS SWITCHES QS3L384 QS3L2384 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QS3L384 and QS3L2384 provide a set of ten high-speed CMOS TTL-compatible bus switches. The low ON resistance of the QS3L384 allows inputs to be connected to outputs without