IDT723 Search Results

Contextual Info: bbE INTEGRATED DEVICE T> m 4Ô25771 G01E55fl 063 « I D T 64 X 36 X 2 DUAL BIDIRECTIONAL CMOS SyncFlFO ADVANCED INFORMATION IDT723612 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Free-running CLKA and CLKB may be asynchronous or coincident

Contextual Info: | CMOS Bus-Matching SyncFlFO 256 x 36, 512 x 36,1,024 x 36 dt PRELIMINARY ¡DT723633 IDT723643 Integrated D ev ic e Techno logy, Inc. NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES:

Contextual Info: CMOS Clocked FIFO With Bus Matching and Byte Swapping IDT723613 64x36 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity FIFO buffering data from Port A

Contextual Info: ggSi'x jjûfey CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 IDT723622 ¡DT723642 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation for the IDT723642 FEATURES: • Free-running CLKA and CLKB m ay be asynchronous or

Contextual Info: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1,024x36x2 IDT723622 IDT723632 IDT723642 Hhtegiated Devize Technology, lie . NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES: • Free-running C LK A and CLKB may be asynchronous or

Contextual Info: CMOS SyncFIFO IDT723611 64x36 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B

Contextual Info: In te g ra te d D e v i e T e d h n o Jo g y , lie . CMOS Triple Bus SyncFlFO1 With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The May 20 errata describes corrections that have

Contextual Info: CMOS SyncBiFlFO WITH BUS MATCHING AND BYTE SWAPPING 64 x 36 x 2 IDT723614 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted

Contextual Info: Integrated Device Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 PRELIMINARY IDT723624 IDT723634 IDT723644 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.

Contextual Info: |dy Integrated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2

Contextual Info: Integrated Device TechnoJogy, lie. PRELIMINARY IDT723624 IDT723634 IDT723644 CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.

IC51-1324-828

Abstract: IDT723612
Contextual Info: IDT723612 CMOS SyncBiFIFO 64 x 36 x 2 Integrated Device Technology, Inc. • • • • Low-power advanced CMOS technology Supports clock frequencies up to 67 MHz Fast access times of 10ns Available in 132-pin plastic quad flat package PQF or space-saving 120-pin thin quad flat package (TQFP)

IC51-1324-828

Abstract: IDT723652 IDT723662 IDT723672
Contextual Info: CMOS SyncBiFIFOTM 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723652 IDT723662 IDT723672 Select IDT Standard timing using EFA EFA, EFB EFB, FFA and FFB flags functions or First Word Fall Through timing (using ORA, ORB, IRA and IRB flag functions)

723674

Abstract: IDT723654 IDT723664 IDT723674
Contextual Info: CMOS SyncBiFIFOTM WITH BUS-MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2, 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723654 IDT723664 IDT723674 ♦ Port B bus sizing of 36 bits long word , 18 bits (word) and 9 bits (byte) ♦ Big- or Little-Endian format for word and byte bus sizes

SDH 209

Abstract: IC51-1324-828 IDT723631 IDT723641 IDT723651
Contextual Info: CMOS SyncFIFO 512 x 36, 1,024 x 36 and 2,048 x 36 IDT723631 IDT723641 IDT723651 Integrated Device Technology, Inc. FEATURES: • Storage capacity: • • • • • • • • • • IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36

IC51-1324-828

Abstract: IDT723622 IDT723632 IDT723642
Contextual Info: IDT723622 IDT723632 IDT723642 CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted

Contextual Info: CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36 4,096 x 36 8,192 x 36 • • • FEATURES • • • • • • • Memory storage capacity: IDT723653 – 2,048 x 36 IDT723663 – 4,096 x 36 IDT723673 – 8,192 x 36 Clock frequencies up to 83 MHz 8 ns access time

b 87 af s 1080

Abstract: DB3-5D
Contextual Info: CMOS SyncFlFO 512x36,1,024x36 and 2,048 x 36 \dt ! IDT723631 IDT723641 IDT723651 Integrated Device Technology, Inc. • Available in 132-pin plastic quad flat package PQFP) or space-saving 120-pin thin quad flat package (TQFP) • Industrial temperature range ( ^ 0 ° C to +85°C) is available

socket Yamaichi ic51 qfp

Abstract: AI893 0R 508 9738A
Contextual Info: IDT723622 IDT723632 IDT723642 CM OS Syn cBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 NOTE: T h e r e i s an e r r a ta n o t i c e o n th e l a s t p a g e a n d th e c o r r e c t i o n s h a v e b e e n i n c o r p o r a t e d i n t o t h i s d o c u m e n t .

CHN 044 VW

Abstract: NB18
Contextual Info: CMOS SyncBiFIFO with Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 IDT723624 IDT723634 IDT723644 • Port B bus sizing ot 36-bits long word , 18-bits (word) and 9-bits (byte) • Big- or Little-Endian tormat tor word and byte bus sizes • Master Reset clears data and contigures FIFO, Partial

Contextual Info: CMOS BUS-MATCHING SyncFIFOTM 256 x 36, 512 x 36, 1,024 x 36 FEATURES: • • • • • • • • • Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 Clocked FIFO buffering data from Port A to Port B Clock frequencies up to 83 MHz 8 ns access time

RST2

Abstract: 024y1 IDt723642l30
Contextual Info: CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 • FEATURES: • • • • • • • • • • Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 Free-running CLKA and CLKB may be asynchronous or

Contextual Info: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 FEATURES: • • • • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8ns access time

IC51-1324-828

Abstract: IDT723631 IDT723641 IDT723651 B0351
Contextual Info: CMOS SyncFIFO 512 x 36, 1,024 x 36 and 2,048 x 36 IDT723631 IDT723641 IDT723651 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge