ICS9DB102Y Search Results

Contextual Info: ICS9DB102 Integrated Circuit Systems, Inc. 2 Output PCI Express* Buffer with CLKREQ# Function Pin Configuration Output Features: • 2 - 0.7V current mode differential output pairs HSCL Key Specifications: • Cycle-to-cycle jitter < 35ps • Output-to-output skew < 25 ps

Contextual Info: ICS9DB102 Advance Information Integrated Circuit Systems, Inc. Low Phase Noise Zero Delay Buffer for PCI-Express Recommended Application: • Zero-delay buffer for PCI-Express • Zero-delay buffer for 0.7V Differential CPU and SATA clocks Pin Configuration

Contextual Info: DATASHEET ICS9DB102 2 Output PCI Express* Buffer with CLKREQ# Function Description Features/Benefits 1-to-2 Zero-delay or fanout buffer for PCI Express.The ICS9DB102 zero-delay buffer supports PCI Express clocking requirements. The ICS9DB102 is driven by a differential SRC

ICS952601

Abstract: ICS954101 ICS9DB102 MO-137
Contextual Info: ICS9DB102 Preliminary Product Preview Integrated Circuit Systems, Inc. 2 Output PCI Express* Buffer with CLKREQ# Function Recommended Application: • 1-to-2 Zero-delay or fanout buffer for PCI Express Pin Configuration ICS9DB102 PLL_BW 1 20 VDDA CLK_INT 2

CK410

Abstract: CK409 ICS9DB102 ICS952601 ICS954101 MO-137
Contextual Info: ICS9DB102 Integrated Circuit Systems, Inc. 2 Output PCI Express* Buffer with CLKREQ# Function Pin Configuration Output Features: • 2 - 0.7V current mode differential output pairs HSCL Key Specifications: • Cycle-to-cycle jitter < 35ps • Output-to-output skew < 25 ps

Contextual Info: ICS9DB102 Integrated Circuit Systems, Inc. 2 Output PCI Express* Buffer with CLKREQ# Function Pin Configuration Output Features: • 2 - 0.7V current mode differential output pairs HSCL Key Specifications: • Cycle-to-cycle jitter < 35ps • Output-to-output skew < 25 ps

differential buffer for pci-express

Abstract: clock buffer pci-express
Contextual Info: ICS9DB102 Advance Information Integrated Circuit Systems, Inc. Low Phase Noise Zero Delay Buffer for PCI-Express Recommended Application: • Zero-delay buffer for PCI-Express • Zero-delay buffer for 0.7V Differential CPU and SATA clocks Pin Configuration

9DB102BFLF

Abstract: 9DB102BGLF 9DB102
Contextual Info: ICS9DB102 Integrated Circuit Systems, Inc. 2 Output PCI Express* Buffer with CLKREQ# Function Pin Configuration Output Features: • 2 - 0.7V current mode differential output pairs HSCL Key Specifications: • Cycle-to-cycle jitter < 35ps • Output-to-output skew < 25 ps