ICS950201Y Search Results
ICS950201Y Datasheets (2)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| ICS950201yFLF-T | Integrated Circuit Systems | Interface, Programmable Timing Control Hub for P4, Tape and Reel | Original | 207.78KB | 16 | ||
| ICS950201yGLF-T | Integrated Circuit Systems | Interface, Programmable Timing Control Hub for P4, Tape and Reel | Original | 207.78KB | 16 |
ICS950201Y Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
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Contextual Info: Integrated Circuit Systems, Inc. ICS950201 Programmable Timing Control Hub for P4 Recommended Application: CK-408 clock with driven mode only for Brookdale chipset with P4 processor. Output Features: • 3 Differential CPU Clock Pairs @ 3.3V • 7 PCI 3.3V @ 33.3MHz |
Original |
ics950201ck-40848mhz318mhz+3 | |
CK-408
Abstract: ICS950201
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Original |
ics950201ck-40848mhz318mhz+3 | |
v-194
Abstract: S3V66 CK-408 ICS950201
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Original |
ics950201ck-40848mhz318mhz+5 | |
CK-408
Abstract: ICS950201
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Original |
ics950201ck-40848mhz318mhz+2 | |
B0803Contextual Info: ICS950201 Integrated Circuit Systems, Inc. Preliminary Product Preview Programmable Timing Control Hub forP4™ ICS950201 Recommended Application: CK-408 clock with driven mode only for Brookdale chipset Pin Configuration with P4 processor. VDDREF 1 REF |
Original |
ics950201ck-40848mhz318mhz+4 | |
950201af
Abstract: 950201AFLF intel 845 circuit diagram all chip
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Original |
ics950201ck-40848mhz318mhz+6 | |
CK-408
Abstract: ICS950201
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Original |
ics950201ck-40848mhz318mhz+3 |