CN3005
Abstract: CN3020 ef2 marking
Contextual Info: Clock Generator for Cavium Processors ICS8430S07I DATA SHEET General Description Features The ICS8430S07I is a PLL-based clock generator specifically designed for Cavium Networks SoC processors. This high performance device is optimized to generate the processor core
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ICS30S07AIL
Abstract: CN3020 ICS8430S07
Contextual Info: ICS8430S07I CLOCK GENERATOR FOR CAVIUM PROCESSORS General Description Features The ICS8430S07I is a PLL-based clock generator specifically designed for Cavium Networks SoC HiPerClockS processors. This high performance device is optimized to generate the processor core reference
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CAVIUM
Abstract: octeon
Contextual Info: PRELIMINARY ICS8430S07I CLOCK GENERATOR FOR CAVIUM PROCESSORS General Description Features The ICS8430S07I is a PLL-based clock generator specifically designed for Cavium Networks SoC HiPerClockS processors. This high performance device is optimized to generate the processor core reference
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CN30XX
Contextual Info: Clock Generator for Cavium Processors ICS8430S07I DATA SHEET General Description Features The ICS8430S07I is a PLL-based clock generator specifically designed for Cavium Networks SoC HiPerClockS processors. This high performance device is optimized to generate the processor core reference clock, the
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ICS8430S07
Abstract: ICS8430S07I ICS8430S07A CN3005 CN3020 CAVIUM DDR400 DDR533 DDR667 ICS8430S07AKI
Contextual Info: Clock Generator for Cavium Processors ICS8430S07I DATA SHEET General Description Features The ICS8430S07I is a PLL-based clock generator specifically designed for Cavium Networks SoC HiPerClockS processors. This high performance device is optimized to generate the processor core reference clock, the
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