IC 3525 INTERNAL BLOCK DIAGRAM Search Results
IC 3525 INTERNAL BLOCK DIAGRAM Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| 54F193/BEA |
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54F193/BEA - Dual marked (M38510/34304BEA) |
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| PEF24628EV1X |
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PEF24628 - SOCRATES Four-channel SHDSL EFM system-on-chip | |||
| MD28F020-12/B |
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28F020 - 2048K (256K x 8) CMOS Flash Memory |
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| 54L193W/C |
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54L193 - 4 Bit Binary Up/Down Counter |
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| 54F174/B2A |
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54F174 - D Flip-Flop, F/FAST Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, CQCC20 - Dual marked (M38510/34107B2A) |
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IC 3525 INTERNAL BLOCK DIAGRAM Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: LTC3525-3/ LTC3525-3.3/LTC3525-5 400mA Micropower Synchronous Step-Up DC/DC Converter with Output Disconnect FEATURES n n n n n n n n n n n n n n DESCRIPTION Up to 95% Efficiency Output Disconnect and Inrush Current Limit Fixed Output Voltages of 3V, 3.3V or 5V |
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LTC3525-3/ LTC3525-3 3/LTC3525-5 400mA 140mA 175mA 3525-3/LTC3525-3 3/LTC3525-5 LTC3459 LT3464 | |
ic 3525 pwm application
Abstract: 2149 RAM 3525 PWM Sunplus Caller ID ic 3525 internal block diagram 2149 ic 3525 8 pin pwm application 3845 PWM power supply application note P10P SPDC1000A1
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SPDC1000A1 SPDC1000A1 ic 3525 pwm application 2149 RAM 3525 PWM Sunplus Caller ID ic 3525 internal block diagram 2149 ic 3525 8 pin pwm application 3845 PWM power supply application note P10P | |
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Contextual Info: « SYNERGY PRELIMINARY SY100EL17V QUAD DIFFERENTIAL RECEIVER SEMICONDUCTOR DESCRIPTION FEATURES • 3.3V and/or 5V power supply options ■ High bandwidth output transitions ■ Internal 75K fì input pull down resistors ■ ESD protection of 2000V ■ Available in 20-pin SOIC package |
OCR Scan |
SY100EL17V 20-pin SY100EL17V EL17V | |
E142 wafer format
Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
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DL140/D Jan-2001 r14525 E142 wafer format HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28 | |
E195
Abstract: E196 MC100E196 MC100E196FN MC100E196FNR2 MC10E196 MC10E196FN MC10E196FNR2
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MC10E196, MC100E196 MC10E/100E196 r14525 MC10E196/D E195 E196 MC100E196 MC100E196FN MC100E196FNR2 MC10E196 MC10E196FN MC10E196FNR2 | |
500MHz Frequency Counter Using MECL
Abstract: MC100E016 MC100E016FN MC100E016FNR2 MC10E016 MC10E016FN MC10E016FNR2 MC10H016 Presettable Counter example spice up down
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MC10E016, MC100E016 MC10E/100E016 MC10H016 r14525 MC10E016/D 500MHz Frequency Counter Using MECL MC100E016 MC100E016FN MC100E016FNR2 MC10E016 MC10E016FN MC10E016FNR2 Presettable Counter example spice up down | |
E195
Abstract: MC100E195 MC100E195FN MC100E195FNR2 MC10E195 MC10E195FN MC10E195FNR2
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MC10E195, MC100E195 MC10E/100E195 r14525 MC10E195/D E195 MC100E195 MC100E195FN MC100E195FNR2 MC10E195 MC10E195FN MC10E195FNR2 | |
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Contextual Info: 19-4402; Rev 0; 1/09 SiGe, High-Linearity, 2000MHz to 3900MHz Downconversion Mixer with LO Buffer The MAX19996A single, high-linearity downconversion mixer provides 8.7dB conversion gain, +24.5dBm IIP3, and 9.8dB noise figure for 2000MHz to 3900MHz WCS, LTE, WiMAX , and MMDS wireless infrastructure applications. With an ultra-wide LO frequency range of |
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2000MHz 3900MHz MAX19996A 2100MHz 4000MHz, MAX19996 | |
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Contextual Info: 19-4402; Rev 1; 5/09 SiGe, High-Linearity, 2000MHz to 3900MHz Downconversion Mixer with LO Buffer The MAX19996A single, high-linearity downconversion mixer provides 8.7dB conversion gain, +24.5dBm IIP3, and 9.8dB noise figure for 2000MHz to 3900MHz WCS, LTE, WiMAX , and MMDS wireless infrastructure applications. With an ultra-wide LO frequency range of |
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2000MHz 3900MHz MAX19996A 3900MHz 2100MHz 4000MHz, MAX19996 | |
yT05
Abstract: LB1475M MFP24 LB1475 2061b SG 3525 VT011 VT010
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OCR Scan |
2061B Na2061B LB1475M yT05 LB1475M MFP24 LB1475 2061b SG 3525 VT011 VT010 | |
MC10E016FNContextual Info: MC10E016, MC100E016 5.0 V ECL 8−Bit Synchronous Binary Up Counter The MC10E/100E016 is a high−speed synchronous, presettable, cascadable 8−bit binary counter. Architecture and operation are the same as the MC10H016 in the MECL 10H family, extended to |
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MC10E016, MC100E016 MC10E/100E016 MC10H016 MC100E016 AND8020/D MC10E016FN MC10E016FNR2 MC100E016FN | |
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Contextual Info: MC10E196, MC100E196 5V ECL Programmable Delay Chip The MC10E/100E196 is a programmable delay chip PDC designed primarily for very accurate differential ECL input edge placement applications. The delay section consists of a chain of gates and a linear ramp delay |
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MC10E196, MC100E196 MC10E/100E196 BRD8011/D. AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1642/D | |
3870Contextual Info: MC10E195, MC100E195 5V ECL Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of gates organized as shown in |
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MC10E195, MC100E195 MC10E/100E195 BRD8011/D. MC100E195 AN1405/D AN1406/D AN1503/D AN1504/D 3870 | |
how to stepup 0.5v to 5vContextual Info: LTC3525L-3 400mA Micropower Synchronous Step-Up DC/DC Converter with Output Disconnect FEATURES n n n n n n n n n n n n n DESCRIPTION Start-Up at 0.7V Typical, 0.88V Guaranteed Up to 95% Efficiency Output Disconnect and Inrush Current Limit 3V Fixed Output Voltage |
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LTC3525L-3 400mA 160mA 3525L-3 LTC3525 400mA, LTC3526/LTC3526B 500mA 3525lfa how to stepup 0.5v to 5v | |
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100E195
Abstract: E195 MC100E195 MC10E195
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MC10E195, MC100E195 MC10E/100E195 MC10E195/D 100E195 E195 MC100E195 MC10E195 | |
1L121Contextual Info: CY10E384L CYPRESS SEMICONDUCTOR ECL/TTL/ECL Translator Features • Low power 110 mA max. • BiCMOS for optimum speed/power • High speed (max.) — 3 ns tpj) TTL-to-ECL — 4 ns tpQ ECL-to-TTL • Low skew < ± 1 ns • Operates on single +5V supply • 28-pin SOJ package |
OCR Scan |
CY10E384L 28-pin CY10E384L CY10E384L-- 28-Lead 1L121 | |
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Contextual Info: CY10E384L CYPRESS SEMICONDUCTOR ECL/TTL/ECL Translator Features • Low power 110 mA max. • BiCMOS for optimum speed/power • High speed (max.) — 3 ns tpD TTL-to-ECL — 4 ns tpj) ECL-to-TTL • Low skew < ± 1 ns • Operates on single +5V supply • 28-pin SOJ package |
OCR Scan |
CY10E384L 28-pin CY10E384L CY10E384Lâ 28-Lead | |
MC10E196
Abstract: E195 E196 MC100E196
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MC10E196, MC100E196 MC10E/100E196 MC10E196/D MC10E196 E195 E196 MC100E196 | |
Y229
Abstract: Y184 XCK 240 st8024 sitronix Sitronix LCD common driver ST8024 Y239 Y121 st 9635 y200 resistor
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ST8024 ST8024 240-output 240-bit 2000/oct/25 2000/Dec/4 ST8024TCP 2001/Sep/28 2002/Jul/22 Y229 Y184 XCK 240 st8024 sitronix Sitronix LCD common driver Y239 Y121 st 9635 y200 resistor | |
UC28450
Abstract: off-line flyback regulator uc3845 DC/DC converter UC3845
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OCR Scan |
UC3844, UC2844, UC3845 UC28450 off-line flyback regulator uc3845 DC/DC converter UC3845 | |
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Contextual Info: COM’L: -12 a Advanced Micro Devices M A C H 1 2 0 -1 2 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 48 Outputs ■ 48 Macrocells ■ 48 Flip-flops; 4 clock choices ■ 12nstro ■ 4 PAL blocks ■ 66.7 MHz max external |
OCR Scan |
12nstro MACH220 MACH120 PAL22V10 provid4456 MACH120: 68-Pin 28-Pin) 25-068-1221028A | |
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Contextual Info: Advanced Micro Devices MACH220-10 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 48 Outputs ■ 96 Macrocells ■ 96 Flip-flops; 4 clock choices ■ ■ 8 PAL blocks with buried macrocells 10 ns tPD ■ ■ 80 MHz fMAx external |
OCR Scan |
MACH220-10 MACH120 MACH220 PAL22V10 oth752b MACH220: 68-Pin 28-Pin) 25-068-1221028A | |
VITESSE application noteContextual Info: jt j* i # IIK P R E LIM IN A R Y DATA S H E E T 5/22/92 VSL4485/ VSL4586 VITESSE Low Skew GaAs PLL Clock Drivers SEMICONDUCTOR CORPORATION Features Eight precision outputs (Q) with output-tooutput skew < 0.5 ns, each being phase and frequency locked to the input reference clock |
OCR Scan |
VSL4485/ VSL4586 VSL4485) VSL4586) 28-pin VSL4485 VSL4586 28-pln VITESSE application note | |
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Contextual Info: FINAL a COM’L: -12 Advanced Micro Devices M A C H L V 2 1 0 - 1 2 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible — V c c = +3.0 V to +3.6 V ■ 58 MHz fMAxexternal Commercial ■ 38 Inputs with advanced pull-up/pull-down |
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PAL22V16â MACH210 MACH110, MACH215 44-Pin 28-Pin) 27-044-1221-028A 055755b MACHLV210-12 | |