100E195 Search Results
100E195 Price and Stock
onsemi MC100E195FNIC DELAY LINE 128TAP PROG 28PLCC | 
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MC100E195FN | Tube | 37 | 
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Microchip Technology Inc SY100E195JIIC DELAY LINE 128TAP PROG 28PLCC | 
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Rochester Electronics LLC SY100E195JCPROGRAMMABLE DELAY CHIP | 
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onsemi MC100E195FNGIC DELAY LINE 128TAP PROG 28PLCC | 
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MC100E195FNG | Tube | 
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MC100E195FNG | 1,819 | 1 | 
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Rochester Electronics LLC MC100E195FNGACTIVE DELAY LINE, PROGRAMMABLE | 
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MC100E195FNG | Tube | 41 | 
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100E195 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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pdc 140
Abstract: DL140 E195 MC100E195 MC10E195 
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MC10E195 MC100E195 MC10E/100E195 DL140 MC10E195/D* MC10E195/D pdc 140 E195 MC100E195 MC10E195 | |
DL140
Abstract: E195 MC100E195 MC10E195 
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MC10E195/D MC10E195 MC100E195 MC10E/100E195 DL140 E195 MC100E195 MC10E195 | |
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 Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10E195 M 100E195 Program m able Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay ot a differential ECL input transition.  | 
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MC10E195 C100E195 MC10E/100E195 DL140 | |
E195
Abstract: SY100E195 SY10E195 SY10E195JC 
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SY10E195 SY100E195 SY10/100E195 M9999-032006 E195 SY100E195 SY10E195 SY10E195JC | |
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 Contextual Info: MOTOROLA Order this document by MC10E195/D SEMICONDUCTOR TECHNICAL DATA M C 10E195 M C 100E195 Program m able D elay Chip The MC1OE/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable  | 
 OCR Scan  | 
MC10E195/D MC1OE/100E195 | |
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 Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10E195 M 100E195 Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition.  | 
 OCR Scan  | 
MC10E/100E195 DL140 | |
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 Contextual Info: * PROGRAMMABLE DELAY CHI P SYNERGY SEMICONDUCTOR I FEATURES_ • ■ Up to 2ns delay range ■ 20ps/digital step resolution ■ >1 GHz bandwidth ■ On-chip cascade circuitry ■ ESD protection of 2000V ■ Fully compatible with Motorola MC10E/100E195  | 
 OCR Scan  | 
SY10E195 SY100E195 20ps/digital MC10E/100E195 J28-1 J28-1 | |
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 Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C10E195 100E195 Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL Input transition.  | 
 OCR Scan  | 
C10E195 MC100E195 MC10E/100E195 DL140 | |
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 Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10E195 100E195 Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition.  | 
 OCR Scan  | 
MC10E195 MC100E195 MC10E/100E195 3b7252 DL140 | |
TRANSISTOR D 1765 720
Abstract: 100E195 E195 MC100E195 MC10E195 
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MC10E195, MC100E195 MC10E/100E195 MC10E195/D TRANSISTOR D 1765 720 100E195 E195 MC100E195 MC10E195 | |
E195
Abstract: SY100E195 SY100E195JC SY10E195 SY10E195JC SY10E195JCTR 
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SY10E195 SY100E195 20ps/digital MC10E/100E195 SY10/100E195 SY10E195 SY10E195JC J28-1 SY10E195JCTR E195 SY100E195 SY100E195JC | |
E195
Abstract: MC100E195 MC100E195FN MC100E195FNR2 MC10E195 MC10E195FN MC10E195FNR2 
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MC10E195, MC100E195 MC10E/100E195 r14525 MC10E195/D E195 MC100E195 MC100E195FN MC100E195FNR2 MC10E195 MC10E195FN MC10E195FNR2 | |
3870Contextual Info: MC10E195, 100E195 5V ECL Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of gates organized as shown in  | 
 Original  | 
MC10E195, MC100E195 MC10E/100E195 BRD8011/D. MC100E195 AN1405/D AN1406/D AN1503/D AN1504/D 3870 | |
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 Contextual Info: MC10E195, 100E195 5V ECL Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of gates organized as shown in  | 
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MC10E195, MC100E195 MC10E/100E195 MC10E195/D | |
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ic 1240 equivalent ics
Abstract: digital clock using logic gates 1-BIT D Latch D7 120 en 4020 TRANSISTOR D 1765 720 BUS BAR specification marking code onsemi Diode A6 MC100E195 pecl logic voltage levels 
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MC10E195, MC100E195 MC10E/100E195 MC10E195/D ic 1240 equivalent ics digital clock using logic gates 1-BIT D Latch D7 120 en 4020 TRANSISTOR D 1765 720 BUS BAR specification marking code onsemi Diode A6 MC100E195 pecl logic voltage levels | |
100E195
Abstract: E195 MC100E195 MC10E195 
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MC10E195, MC100E195 MC10E/100E195 MC10E195/D 100E195 E195 MC100E195 MC10E195 | |
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 Contextual Info: * PROGRAMMABLE DELAY CHIP SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Up to 2ns delay range ~20ps/digital step resolution >1GHz bandwidth On-chip cascade circuitry ESD protection of 2000V Fully compatible with Motorola MC10E/100E195 PIN CONFIGURATION N CO T  | 
 OCR Scan  | 
20ps/digital MC10E/100E195 SY10E195 SY100E195 SY10E195JC J28-1 SY10E195JCTR | |
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 Contextual Info: w Y 3? W >R DESCRIPTION • Up to 2ns delay range ■ Extended 100E V ee range of -4 .2 V to -5 .5 V ■ =20ps/digitai step resolution ■ >1 GHz bandwidth ■ On-chip cascade circuitry ■ 75Kki2 input pulldown resistor ■ Fully com patible with M otorola MC10E/100E195  | 
 OCR Scan  | 
Y10E195 20ps/digitai 75Kki2 MC10E/100E195 28-pin 32-gate SY10E195 SY100E195 SY10E195JC SY10E195JCTR | |
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 Contextual Info: bfiE D MOTOROLA • SEMICONDUCTOR bBb7ES5 OOTM'ÌVM EÔG m o m MOTOROLA SC LOÙIC I TECHNICAL DATA MC10E195 100E195 Programmable Delay Chip The MC10E/100E195 is a programmable delay chip (PDC) designed primarily for clock de-skewlng and timing adjustment. It provides variable  | 
 OCR Scan  | 
MC10E195 MC100E195 MC10E/100E195 | |
TRANSISTOR D 1765 720
Abstract: E195 MC100E195 MC100E195FN MC100E195FNR2 MC10E195 MC10E195FN MC10E195FNR2 
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MC10E195, MC100E195 MC10E/100E195 r14525 MC10E195/D TRANSISTOR D 1765 720 E195 MC100E195 MC100E195FN MC100E195FNR2 MC10E195 MC10E195FN MC10E195FNR2 | |
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 Contextual Info: MOTOROLA O rder this docum ent by M C10E195/D SEMICONDUCTOR TECHNICAL DATA MC10E195 100E195 Programmable Delay Chip The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition.  | 
 OCR Scan  | 
C10E195/D MC10E195 MC100E195 MC10E/100E195 | |
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 Contextual Info: MC10E195, 100E195 5V ECL Programmable Delay Chip Description The MC10E/100E195 is a programmable delay chip PDC designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of gates organized as shown in  | 
 Original  | 
MC10E195, MC100E195 MC10E/100E195 MC10E195/D | |
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 Contextual Info: *SYNERGY PR O G R A M M A B LE DELAY CHIP SEMICONDUCTOR FEATURES Clockworks SY10E195 100E195 DESCRIPTION Up to 2ns delay range =£Ops/digital step resolution >1GHz bandwidth On-chip cascade circuitry ESD protection of 2000V Fully compatible with Motorola MC10E/100E195  | 
 OCR Scan  | 
SY10E195 SY100E195 MC10E/100E195 10/100E SY10E195JC SY10E195JCTR SY100E195JC SY100E195JCTR | |
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 Contextual Info: * PROGRAMMABLE DELAY CHIP SYNERGY SEM IC O N D U C TO R FEATURES • ■ C lo c k w o r k s ' SY10E195 S Y 10Q E 195 DESCRIPTION Up to 2ns d e la y range 2 0 p s /d ig ita l s te p re s o lu tio n ■ >1 GHz b a n d w id th ■ O n -c h ip c a sca d e c irc u itry  | 
 OCR Scan  | 
SY10E195 10E/100E195 SY10/100E195 SY100E195 SY10E195JC SY100E195JC J28-1 J28-1 | |