IBM T22 Search Results

bi-tronics

Abstract: ibm t41 terminal block in pdb ppf 11 16-BYTE ST78C36 ST78C36A ST78C36ACJ44 ST78C36CJ44 ST78C36CQ64
Contextual Info: ST78C36 ST78C36A ECP/EPP PARALLEL PRINTER PORT WITH 16-BYTE FIFO’s DESCRIPTION PLCC Package FEATURES • IBM AT bus compatible • Bi-directional port capability • 16 byte FIFO for ECP modes • On-chip oscillator ST78C36A, ST78C36CQ64 • Software selectable Interrupt (5, 7, or 9) and 8-bit

IBMN364164

Abstract: IBMN364804 IBMN364164CT3C-68 IBMN364404 IBMN364164CT3C-360
Contextual Info: . IBMN364164 IBMN364804 IBMN364404 64Mb Synchronous DRAM - Die Revision C Features • Programmable Wrap: Sequential or Interleave • High Performance: -68 -75A, -260, -360, Units CL=3 CL=3 CL=2 CL=3 fCK Clock Frequency 150 133 100 100 MHz tCK Clock Cycle

Contextual Info: I B M 1 1N1645L 1M X 64 DRAM MODULE Features • System Performance Benefits: • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module -Non buffered for increased performance -Reduced noise 35 V ss/V qc P^s -Byte write, byte read accesses

82306

Contextual Info: in t e T 82306 LOCAL CHANNEL SUPPORT CHIP Integrated Programmable Timer/ Counters 0, 2, 3 Integrates System Registers and Ports Low Power CHMOS Technology 100-Pin Plastic Quad Flat Pack Packaging • Supports I/O Peripherals on the Local Channel ■ Supports VGA Controller on the VGA

Contextual Info: IBM13Q8739CC 8M x 72 Buffered SDRAM Module Features • 200-Pin emerging JEDEC Standard, Buffered 8Byte Dual In-line Memory Module • 8M x 72 Synchronous DRAM DIMM • Performance: CAS Latency = 2* -10 j Units j ! MHz j ; ns jfcK j Clock Frequency 66 ; tcK2

Contextual Info: 82307 DMA/Micro Channel ARBITRATION CONTROLLER • 8 Channel DMA Controller 8/ 16-Bit ■ Integrated Central Arbitration Control Point ■ Refresh Address Generation/Cycling ■ Numerics Co-processor Interface ■ Address Decoding — Numeric Coprocessor

Contextual Info: in te i 82588 HIGH INTEGRATION LOCAL AREA NETWORK CONTROLLER Integrates ISO Layers 1 and 2 — CSMA/CD Medium Access Control MAC — On-Chip Manchester, NRZI Encoding/Decoding — On-Chip Logic Based Collision Detect and Carrier Sense 2 Clocks per Data Transfer

AD27

Abstract: I960 XRT94L31 XRT94L31IB AF6A 3 pin
Contextual Info: XRT94L31 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC MARCH 2007 GENERAL DESCRIPTION The XRT94L31 is a highly integrated SONET/SDH terminator designed for E3/DS3/STS-1 mapping/demapping functions from either the STS-3 or STM-1 data stream. The XRT94L31 interfaces directly to the

82072A

Abstract: 8272A or 82072A
Contextual Info: r a S O M O N Â Iffif in te i 82072 CHMOS HIGH INTEGRATION FLOPPY DISK CONTROLLER Programmable Drive Motor On/Off Delays Addresses Up to 256 Tracks Directly, Supports Unlimited Tracks Integrated Analog Data Separator with Software Selectable Data Rates 250K,

intel floppy disk controller 8272

Abstract: intel floppy disk controller 82078 8272 floppy disk controller 82072 290474 82077AA 82077SL CLK48 block diagram of 8272 floppy disk controller intel floppy disk controller 8272a
Contextual Info: 82078 44 PIN CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER Y Small Footprint and Low Height Package Y Enhanced Power Management Application Software Transparency Programmable Powerdown Command Save and Restore Commands for Zero-Volt Powerdown Auto Powerdown and Wakeup

XC2VP7-FG456

Abstract: XC2VP300 XC2VP20 fg676 AH36 XC2VP100FF1696 RAM32x1 305-120 RAM16X ds1102 vhdl code for uart communication
Contextual Info: Product Not Recommended For New Designs 1 R DS083 v5.0 June 21, 2011 Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet Product Specification Module 1: Introduction and Overview Module 3: DC and Switching Characteristics 10 pages 59 pages

Nuvoton 795

Abstract: w83627ehg Nuvoton 794 ior 7923 W83627EHF OD12t Nuvoton 791 W83627EG Nuvoton 3 TERMINAL 1838 ir sensor
Contextual Info: W83627EHF/EF W83627EHG/EG NUVOTON LPC I/O Note: This document is both for UBC and UBH version except the specified descriptions Date: April 7th, 2009 Revision: 1.94 W83627EHF/EF, W83627EHG/EG TABLE OF CONTENTS1. GENERAL DESCRIPTION . 1

Intel 82593

Abstract: n82593 82593SX
Contextual Info: 82593 CSMA/CD CORE LAN CONTROLLER • Supports Industry Standard LANs — IEEE 10BASE5 Ethernet* — IEEE 10BASE2 (Cheapernet) — IEEE 10BASE-T (TPE) ■ Simple, High-Performance Control and Data Interface _ — Control and Status via RD, WR, and CS Lines

HYC9088

Abstract: COM20022I-HT COM20022ITQFP COM20022 COM20022I
Contextual Info: COM20022I 10 Mbps ARCNET ANSI 878.1 Controller with 2Kx8 On-Board RAM Datasheet Product Features ƒ New Features − − − − − ƒ Data Rates up to 10 Mbps Selectable 8/16 Bit Wide Bus With Data Swapper Programmable DMA Channel Programmable Reconfiguration Times

CP136

Abstract: marking code M21 CP-14 CP15 MARKING Z23 5cp115 marking ab20 s8 marking CP45
Contextual Info: C-5 Network Processor Data Sheet TM Supporting C-5 Network Processor Version D0 Feature List Simple programming model • C/C+ programmable Standard instruction set Standard Applications Programming Interface C-Ware APITM Comprehensive C-WareTM Software Toolset (easy to

CQ oscillator 1MHz (1/2 size) SC1

Abstract: til 815 display TMJ 268 JYs 71 transistor px5 12nc open VPX standard block diagram of mri machine cmos cots radiation manufacturer list cots radiation switching HM 1211 plc
Contextual Info: • 7110fl5fci GGbblflb 3SM B IP H IN P hilips Sem iconductors M icrocontroller Products O bjective specification Single-chip 8-bit m icrocontroller fo r TV on-screen display, VS tuning and control function 1. INTRODUCTION The P83CL168/167/268/267 single chip

SANYO LA 7680

Abstract: MPC8260 MPC8541E MPC8555E MPC860T PC16550D POWERPC E500 instruction set
Contextual Info: Freescale Semiconductor MPC8541EEC Rev. 4, 12/2006 Technical Data MPC8541E PowerQUICC III Integrated Communications Processor Hardware Specifications The MPC8541E integrates a PowerPC™ processor core built on Power Architecture™ technology with system logic

AF125

Abstract: n345 pioneer amplifier an214 diode t25 4 d9 DIODE T25-4 AY102 AF155 AN214 amplifier horizontal driver transistor D155 IC AN214
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

Phoenix BIOS manual f.34

Abstract: Phoenix BIOS f.34 manual dSMC Phoenix BIOS user manual f.34 acadia Cyrix 486 Cyrix 6x86mx 243192 diode T35 12H stamford voltage regulator
Contextual Info: Preliminary Information 2 PROCESSOR Data Sheet Preliminary Information September 1998 IDT WINCHIP 2TM PROCESSOR DATA SHEET This is Version 1.0 of the IDT WinChip 2 Processor data sheet. The latest versions of this data sheet may be obtained from www.winchip.com

MPC8260

Abstract: MPC8540EC MPC8560 MPC860T
Contextual Info: Freescale Semiconductor MPC8540EC Rev. 3.1, 12/2004 Technical Data MPC8560 Integrated Processor Hardware Specifications The MPC8560 contains a PowerPC processor core. The MPC8560 integrates a processor that implements the PowerPC architecture with system logic required for networking, storage,

8051 ADDRESSING MODES

Abstract: BZY 100 BZY 56 F1s0 GPIO109 SST79LF008 GA20 GPIO105 uart 8051 XTAL 20MHz
Contextual Info: Mobile Platform Controller plus 8 Mbit LPC Firmware Flash SST79LF008 SST79LF008 Notebook System Controller with 8 Mbit LPC Firmware Flash Advance Information FEATURES: • 8 Mbit LPC Firmware Memory SuperFlash device with integrated LPC Keyboard, System configuration, and Power Management controller

DB14-000174-02

Abstract: DB14-000174 LSIFC919X Fusion-MPT Message Passing Interface MPI specification PAR64 transducers for engines ARM PCI hybrid "User Datagram Protocol" Fusion-MPT Message Passing Interface Specification LSI Message Passing Interface MPI specification
Contextual Info: TECHNICAL MANUAL LSIFC919X Single Channel Fibre Channel I/O Processor June 2003 Version 2.0 DB14-000225-00 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

AP-720

Abstract: RQ-70 dsa 362 82801BA GBA ST1 152364
Contextual Info: R Intel 850 Chipset: 82850 Memory Controller Hub MCH Datasheet November 2000 Document Number: 290691-001 82850 MCH R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

T54P

Contextual Info: Data Sheet June 1998 microelectronics group Lucent Technologies Bell Labs Innovations DSP1620 Digital Signal Processor 1 Features • Supported by D S P 1 6 2 0 software and hardware developm ent tools ■ Optim ized for digital cellular infrastructure applications—