HYMP Search Results

pc2-4300

Abstract: HYNIX Cross Reference
Contextual Info: 64Mx64 bits DDR2 SDRAM SO-DIMM HYMP564S64 L 8 Revision History No. History Date 0.1 Defined Target Spec. Dec. 2003 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

c14f

Contextual Info: BATTERY SPECIFICATIONS HYMP-AAA６00N Specifications Nominal voltage Capacity mAh 1.2V 0.2C 1C 600 540 630 600 0.39 0.02 in 10.0 0.5 mm 1.69 0.02 in 43.0 0.5 mm 12g(0.423oz) 35m (After charge) 60mA 15hrs. 600mA 1.2hrs. 30mA 20mA -10 50 14oF 122oF 45 32oF 113oF

Contextual Info: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 4 DESCRIPTION Hynix HYMP264R72(L)4 series is registered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules(DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMP264R72(L)4 series consists of eighteen 64Mx4 DDR2 SDRAMs in 60-Lead FBGA chipsize packages. Hynix HYMP264R72(L)4 series provide

Contextual Info: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec., 2) Corrected a typo of SPD byte #41(tRC) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

Contextual Info: 32Mx64 bits DDR2 SDRAM SO-DIMM HYMP232S64 L 6 Revision History No. History Date 0.1 Defined target spec. May . 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: 128Mx72 bits DDR2 SDRAM Registered DIMM HYMP512R72 L 4 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(byte #22,#42) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

Contextual Info: 64Mx64 bits DDR2 SDRAM SO-DIMM HYMP564S64 L P6 Revision History No. History Date 0.1 Defined target spec. July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: 32Mx64 bits Unbuffered DDR2 SDRAM Pb-FREE DIMM HYMP532U64 L P6 DESCRIPTION Preliminary Hynix HYMP532U646 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx64 high-speed memory arrays. Hynix HYMP532U648 series consists of

Contextual Info: 64Mx72 bits Registered DDR SDRAM DIMM HYMP564R72A L 8 DESCRIPTION Preliminary Hynix HYMP564R72(L)8 series is registered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules(DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMP564R72(L)8 series consists of nine 64Mx8 DDR2 SDRAMs in 60-Lead FBGA chipsize packages. Hynix HYMP564R72(L)8 series provide a

DDR2-400

Abstract: DDR2-533 DDR2-667 MO-237 PC2-3200 PC2-4300 PC2-5300
Contextual Info: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 8 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(Bye #22) Apr. 2004 Corrected Pin assignment table Nov. 2004

HYMP564U64P8-E3

Abstract: HYmp564u64p8
Contextual Info: HYMP564U64P8-E3/C4 SERIAL PRESENCE DETECT E3 Function described 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58~61 62 63 Number of SPD Bytes Written during Module Production

DDR2-400

Abstract: DDR2-533 HYMP532S64P6 MO-224 PC2-3200 PC2-4300
Contextual Info: 32Mx64 bits DDR2 SDRAM SO-DIMM HYMP532S64 L P6 Revision History No. 0.1 History Date 1) Defined Target Spec. 2) Corrected typo in pin assignment table(#140) 3) Corrected Pin assignment table July 2004 Designated Pin Cap. Spec. Aug. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

Contextual Info: 64Mx64 bits DDR2 SDRAM SO-DIMM HYMP564S64 L 8 Revision History No. History Date 0.1 Defined Target Spec. Dec. 2003 May. 2004 0.2 1) Added Input Cap. Spec. 2) Corrected SPD typos. 3) Removed Preliminary 1) Added Input Cap. Spec. 2) Corrected SPD typos. Jul. 2004

Contextual Info: 32Mx64 bits DDR2 SDRAM SO-DIMM HYMP232S64 L 6 Revision History No. History Defined target spec. 0.1 Date Remark May . 2004 1) Corrected typo in pin assignment table(#140) 2) Corrected Pin assignment table July 2004 Designated Pin Cap. Spec. Aug. 2004 This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

DDR2-400

Abstract: DDR2-533 DDR2-667 MO-237 PC2-3200 PC2-4300 PC2-5300
Contextual Info: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP564R72 L 8 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Jan. 2004 0.2 1) Added contents about operating Conditions Jan. 2004 0.3 1) Added IDD Spec. Mar. 2004 1) Added Pin Capacitance Spec. 2) Corrected tRFC Spec. on page 14

HY5PS1G421

Abstract: DDR2-400 DDR2-533 PC2-3200 PC2-4300 RA13 M4C5 M4C5 1
Contextual Info: 256Mx72 bits DDR2 SDRAM Registered DIMM HYMP125R72 L M4 Revision History No. 0.1 0.2 History Draft Date Initial Release Mar. 2004 Corrected IDD Spec. May. 2004 Corrected Pin assignment table & SPD typo(#42) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

Contextual Info: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM Pb-FREE DIMM HYMP564U64P8/HYMP564U72P8 Revision History No. 0.1 History Defined Target Spec. Draft Date Remark May. 2004 This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

HYMP512R72P8-E3

Contextual Info: HYMP512R72P8-E3/C4 SERIAL PRESENCE DETECT E3 Function described 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 Number of SPD Bytes Written during Module Production

HYMP532S64BP6-E3

Abstract: HYMP532S64BP6-C4 HYMP532S64BP6-Y5 HYMP532S64BP6-S5 10 M 8B PLL00
Contextual Info: SERIAL PRESENCE DETECT HYMP532S64BP6-E3 Function described HYMP532S64BP6-C4 HYMP532S64BP6-Y5 HYMP532S64BP6-S5 Function support HEX Number of SPD Bytes Written during Module Production 128 Bytes 80 128 Bytes 80 128 Bytes 80 128 Bytes 80 1 Total Number of Bytes in SPD Device

HYMP512F72BP8D2-Y5

Abstract: HYMP512F72BP8D2-C4 HYNIX manufacturing code
Contextual Info: HYMP512F72BP8D2-C4/Y5 SERIAL PRESENCE DETECT HYMP512F72BP8D2-C4 Function described HYMP512F72BP8D2-Y5 Function support HEX Function support HEX 176 /256 / 116 Bytes 92 176 /256 / 116 Bytes 92 1.1 11 1.1 11 Number of Serial PD Bytes written/SPD Device Size/CRC Coverage

HYMP125P72AP4-C4

Abstract: HYMP125P72AP4-E3 HYMP125P72AP4-S5 HYMP125P72AP4-Y5 HYNIX rDIMM
Contextual Info: SERIAL PRESENCE DETECT HYMP125P72AP4-E3 Function described HYMP125P72AP4-C4 HYMP125P72AP4-Y5 HYMP125P72AP4-S5 Function support HEX Function support HEX Function support HEX Function support HEX Number of SPD Bytes Written during Module Production 128 Bytes

HYMP564F72BP8D2-Y5

Abstract: HYMP564F72BP8D2 HYMP564F72BP8D2-C4
Contextual Info: HYMP564F72BP8D2-C4/Y5 SERIAL PRESENCE DETECT HYMP564F72BP8D2-C4 Function described HYMP564F72BP8D2-Y5 Function support HEX Function support HEX 176 /256 / 116 Bytes 92 176 /256 / 116 Bytes 92 1.1 11 1.1 11 09 DDR2 SDRAM FB-DIMM 09 Number of Serial PD Bytes written/SPD Device Size/CRC Coverage

HYMP564U64BP8-C4

Abstract: HYMP564U64BP8-Y5 HYMP564U64BP8-S6 66 2c HYMP564U64BP8-E3 HYMP564U64BP8-S5 HYMP564U64 1E29
Contextual Info: SERIAL PRESENCE DETECT HYMP564U64BP8-E3 Function described HYMP564U64BP8-C4 HYMP564U64BP8-Y5 HYMP564U64BP8-S5 HYMP564U64BP8-S6 Function support HEX Function support HEX Function support HEX Function support HEX Function support HEX Number of SPD Bytes Written during Module Production

Contextual Info: HYMP112U72P8-E3/C4 SERIAL PRESENCE DETECT E3 Function described 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58~61 62 63 Number of SPD Bytes Written during Module Production