HD74HC37 Search Results

HD74HC377

Abstract: HD74HC377FPEL HD74HC377P PRDP0020AC-B PRSP0020DD-B
Contextual Info: HD74HC377 Octal D-type Flip-Flops with Enable REJ03D0622-0200 (Previous ADE-205-501) Rev.2.00 Mar 30, 2006 Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular voltage level and is not

Hitachi DSA002789

Contextual Info: HD74HC375 Quad. Bistable Latches Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data D input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable

Hitachi DSA00279

Contextual Info: HD74HC373/HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low,

Hitachi DSA002789

Abstract: HD74hc377
Contextual Info: HD74HC377 Octal D-type Flip-Flops with Enable Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a

Hitachi DSA002789

Contextual Info: HD74HC374/HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-flops (with inverted 3-state outputs) Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only that the former is a true outputs and the latter is a false outputs. Data at the D

HD74HC373P

Abstract: HD74HC373 75x12 HD74HC373FPEL HD74HC373RPEL HD74HC373TELL HD74HC533 HD74HC533FPEL HD74HC533P
Contextual Info: HD74HC373, HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) REJ03D0619-0300 Rev.3.00 Mar 25, 2009 Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of

HD74HC374

Abstract: HD74HC534 Hitachi DSA00395
Contextual Info: HD74HC374/HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-flops (with inverted 3-state outputs) Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs,

HD74HC373

Abstract: HD74HC533 DSA003719
Contextual Info: HD74HC373/HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at

Contextual Info: HD74HC374 HD74HC534 • Octal D -type Flip-Flops with 3 -s ta te outputs • Octal D -type Flip-Flops (with inverted 3 -s ta te o u tp u ts ) These devices are positive edge triggered flip-flops. The d if­ ference between H D 7 4 H C 3 7 4 and H D 7 4 H C 5 3 4 is only that

Contextual Info: HD74HC377 Octal D-type Flip-Flops with Enable Information at the D inputs meeting the setup time require- | ments is transferred to the Q outputs on the positive-going PIN ARRANGEMENT edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular voltage level and is not

Contextual Info: HD74HC375 # Q u a d Bistable Latches This latch » ideally suited for usa as temporary storage for binary information between processing units and input/ output or indicator units. Information present at a data O input is transferred to the Q output when the enable (G) is

HD74HC375

Abstract: Hitachi DSA00389
Contextual Info: HD74HC375 Quad. Bistable Latches Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data D input is transferred to the Q output

HD74HC373P

Abstract: HD74HC373 HD74HC373FPEL HD74HC533 HD74HC533FPEL HD74HC533P
Contextual Info: HD74HC373, HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) REJ03D0619-0200 (Previous ADE-205-498) Rev.2.00 Mar 30, 2006 Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of

HD74HC375

Abstract: Hitachi DSA00222
Contextual Info: HD74HC375 Quad. Bistable Latches ADE-205-500 Z 1st. Edition Sep. 2000 Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output

HD74HC373

Contextual Info: I fl 4 i H t 2 G 3 O Q I O S I Q 2 I H I T A C H I / L O G I C / A R R A Y S / M E n TB T-46-07-11 HD74HC373 HD74HC533 • Octal D-type Transparent Latches with 3-state outputs) • Octal D-type Transparent Latches (with-inverted 3-state outputs) When the latch enable inpu t is high, the Q outputs o f

HD74HC375

Abstract: HD74HC375P PRDP0016AE-B PRSP0016DH-B
Contextual Info: HD74HC375 Quad. Bistable Latches REJ03D0621-0200 Previous ADE-205-500 Rev.2.00 Mar 30, 2006 Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable

ck g

Abstract: HD74HC377 Hitachi DSA003777
Contextual Info: HD74HC377 Octal D-type Flip-Flops with Enable Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular

Contextual Info: HD74HC375 • Q u a d . Bistable Latches This latch is ideally suited for use as temporary storage for binary | information between processing units and input/ i PIN ARRANGEMENT output or indicator units. Information present at a data D id [ T input is transferred to the Q output when the enable (G) is

HD74HC373

Contextual Info: HD74HC373 HD74HC533 W hen th e la tch enable in p u t • Octal D-type Transparent Latches with 3-state outputs • Octal D-type Transparent Latches (with inverted 3-state outputs) i t h ig h , th e Q o u tp u ts o f | I PIN ARRANGEMENT 1 IH D74HC373 H D 7 4 H C 3 7 3 w ill fo llo w th e O in p u ts a n d th e Q o u tp u ts o f

DIODE go z 4d

Abstract: HD74HC373
Contextual Info: HD74HC373 HD74HC533 When the latch enable input # Octal D-type Transparent Latches with 3-state outputs • Octal D-type Transparent Latches (with inverted 3-state outputs) is high, the Q outputs o f | I PIN ARRANGEMENT * »H D 74H C 373 H D 7 4 H C 3 7 3 w ill fo llo w the D inputs and the Q outputs o f

HD74HC374

Abstract: HD74HC534 Hitachi DSA00222
Contextual Info: HD74HC374/HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-Flops (with inverted 3-state outputs) ADE-205-499 (Z) 1st. Edition Sep. 2000 Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and

HD74HC374P

Abstract: HD74HC374 HD74HC374FPEL HD74HC534 HD74HC534P HD74HC534FPEL
Contextual Info: HD74HC374, HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-Flops (with inverted 3-state outputs) REJ03D0620-0200 (Previous ADE-205-499) Rev.2.00 Mar 30, 2006 Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only

HD74HC373

Abstract: HD74HC533 I38D Hitachi Scans-001
Contextual Info: I fl 4iHt2G3 OQIOSIQ 2 I HITACHI/ LOGIC/ARRAYS/MEn TB T-46-07-11 HD74HC373 HD74HC533 • Octal D-type Transparent Latches with 3-state outputs) • Octal D-type Transparent Latches (with-inverted 3-state outputs) When the latch enable inpu t is high, the Q outputs o f

Contextual Info: HD74HC374 HD74HC534 • Octal D-type Flip-Flops with 3-state outputs • Octal D-type Flip-Flops (with inverted 3 - state o u tp u ts) These devices are positive edge triggered flip -flo p s. The d if­ ference between HD74HC374 and HD74HC534 is on ly that