HCT390 Search Results

74HC-HCT390

Abstract: HIGH FREQUENCY DECADE COUNTER
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT390

Contextual Info: 74HC/HCT390 MSI v _ D U A L D EC AD E RIPPLE C O U N TER F E A TU R ES • T w o BCD decade or bi-quinary counters • One package can be configured to divide-by-2, 4, 5, 10, 2 0 ,2 5 , 50 or 100 • T w o master reset inputs to clear each decade counter in d ividu a lly

74MCT

Abstract: 74HC-HCT390 74HC 74HCT 74mc of decade counter CMOS FAMILY
Contextual Info: 74HC/HCT390 MSI D U A L DECADE RIPPLE COUNTER FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-by-2,4, 5 ,1 0 , 20, 25, 50 or 100 • Two master reset inputs to clear each decade counter individually • Output capability: standard

74HC-HCT390

Abstract: bcd decade counter ttl 74HC 74HCT
Contextual Info: 74HC/HCT390 MSI DUAL DECADE RIPPLE COUNTER FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-by-2,4, 5 ,1 0 ,2 0 ,2 5 , 50 or 100 • Two master reset inputs to clear each decade counter individually • Output capability: standard

74HC

Abstract: 74HCT
Contextual Info: 74HC/HCT390 MSI D U A L D E C A D E RIPPLE C O U N T E R F E A TU R E S Tw o BCD decade or bi-quinary counters • One package can be configured to divide-by-2,4 , 5 , 1 0 , 2 0 , 2 5 , 5 0 or 100 • Tw o master reset inputs to clear each decade counter individually

Contextual Info: INTEGRATED CIRCUITS DAT For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT390

74HC390D

Abstract: 74HC390N ncp1 74HCT390N 74hct390d 74HC390
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT390

TMS23

Contextual Info: 37E J> , Hi M 3 0 5 57 1 HA RR IS S E M I C O N D D D E S T T b 1 • HAS , _ High-Reliability High-Speed CMOS Logic ICs 'T-MS-23>-l3 SECTOR CD54HC390/3A HCT390/3A T -'S l- Ie} Burn-In Test-Circuit Connections Static CD54HC/HCT390 Dynamic Use Static II fo r /3 A burn-in and Dynam ic fo r Life Test.

74HC

Abstract: HIGH FREQUENCY DECADE COUNTER
Contextual Info: Philips Semiconductors Product specification Dual decade ripple counter 74HC/HCT390 decade or bi-quinary configuration, since they share a common master reset input nMR . If the two master reset inputs (1MR and 2MR) are used to simultaneously clear all 8 bits of the counter, a number of counting configurations

Contextual Info: High-Reliability High-Speed CMOS Logic ICs CD54HC390/3A HCT390/3A Burn-ln Test-Circuit Connections Static CD54HC/HCT390 Dynamic CD54HC/HCT390 Use Static II for /3A burn-in and Dynam ic fo r Life Test. STATIC BURN-IN I GROUND Vcc (6V) 1,2,4,8,12,14,15

CD54HCT390

Abstract: CD54HCT390F3A CD74HC390 CD74HC390E CD74HCT390 HC390 Cmos 74 HC390
Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185B High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised May 2003 Features Description

Contextual Info: 37E D H 430 E 271. . G Ü S S T T M Ö«HAS • Ha r r i s seiu c o n » sector u . „c . High-ReliabilityHigh-Speed CMOS LogicICs ~PLlk-a7-l CD54HC377/3A "R-iS-Z-3>-l3> CD54HCT377/3A Switching Speed (Limits with black dots (• are tested 100%.)

Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

Contextual Info: _ High-Reliability High-Speed CMOS Logic ICs CD54HC377/3A CD54HCT377/3A Switching Speed Lim its w ith black dots (« are tested 100%.) SWITCHING CHARACTERISTICS (CL = 50 pF, Input t„ t, = 6 ns)_

octal Bilateral Switches

Abstract: decoder Ic 8 line to 64 hct1284 HCT9046A
Contextual Info: Philips Sem iconductors M i i M C D i r & i iw ncv NUMERICAL INDEX HIGH L0G|C SPEEDFA^ CMOS ILY NUM ERICAL INDEX type no. description page HC/HCTOO quad 2-input NAND gate 107 HC/HCT02 quad 2-input NOR gate 111 HC/HCT03 quad 2-input NAND gate with open collector outputs

MULTIPLEXER IC max 455

Abstract: CD54HCT390 CD54HCT390F3A CD74HC390 CD74HC390E CD74HCT390 HC390
Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

CD54HCT390

Abstract: CD54HCT390F3A CD74HC390 CD74HC390E CD74HCT390 HC390
Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

Contextual Info: 74H C /H C T 3 9 0 M SI D U A L D E C A D E R IPPLE C O U N T E R FEATURES • Two BC D decade or bi-quinary counters • One package can be configured to divide-by-2, 4, 5,10, 20,25, 50 or 100 • Two master reset inputs to clear each decade counter individually

CD74HC390E

Abstract: CD54HCT390 CD54HCT390F3A CD74HC390 CD74HCT390 HC390
Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

CD54HCT390

Abstract: CD54HCT390F3A CD74HC390 CD74HC390E CD74HCT390 HC390
Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

Contextual Info: [ /Title CD74 HC390 , CD74 HCT39 0 /Subject (High Speed CMOS CD74HC390, HCT390, HCT390 Data sheet acquired from Harris Semiconductor SCHS185C High-Speed CMOS Logic Dual Decade Ripple Counter September 1997 - Revised October 2003 Features Description

Contextual Info: Technical Data File Number CD54/74HC390 CD54/HCT390 1838 High-Speed CMOS Logic Dual Decade Ripple Counter Type Features: • Two BCD decade or bi-quinary counters ■ One package can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100 • Two master reset inputs to clear each decade