H75T3 Search Results

AL5V

Abstract: S020D
Contextual Info: PANASONIC INDL/ELEK 6 9 3 £ 3 52 PANASONIC -CIO 75 Ô F p bT32flS2 QÔD7E7S IN D L*ELEC TR O N IC 72C 0 7 2 7 5 LS TTL DN74LS'>U-X - 0 DN74LS541 /DN74LS541S DN74LS541/DN74LS541S Octal B u ffers and Line D riv ers with 3 - sta te Outputs DN 74 LS 541/S |±, f f t * ' f t * L fz 8 Ì ! l f § # i i « t ì i * |i l W A *

51ti

Abstract: DN74LS541 S020D
Contextual Info: PANASONIC INDL/ELEK 6 9 3 £ 3 52 PANASONIC -CIO 75 Ô F p bT32flS2 QÔD7E7S IN D L * E L E C T R O N IC 72C LS TTL DN74LS'>U-X 07275 - 0 DN74LS541 /DN74LS541S DN74LS541/DN74LS541S Octal B uffers and Line D rivers with 3 - state Outputs DN 74 LS 541/S |±, f f t * ' f t * L fz 8 Ì ! l f § # i i « t ì i * |i l W A *

74LSOO AND gate

Abstract: 74LSOO
Contextual Info: I C O f i f i L O f a O O §T I I ^Quadruple 2-input Exclusive-NOR Gates with open collector outputs • FUNCTION TABLE ■ PIN ARRANGEMENT Inputs Output Y H L L H B L H L H A L L H H ■ RECOMMENDED OPERATING CONDITIONS Symbol Ite m High level output voltage

74LSOO

Contextual Info: I I I C O f i f i L O f a O O §T ^Quadruple 2-input Exclusive-NOR Gates with open collector outputs • FUNCTION TABLE ■ PIN ARRANGEMENT In p u ts O u tp u t A B Y L L H L H L H L L H H H ■ RECOMMENDED OPERATING CONDITIONS m ax VOH - - 5 .5 V L o w lev el o u tp u t c u r r e n t

oc45

Abstract: DN74LS363 DN74LS363S
Contextual Info: PANASONIC INDL/ELEK 6 9 3 2 8 5 2 PANAS ON IC -C I O 72 Ï>¥J b13aflS5 0 0 0 7 2 S L .1 7 2 0 072 26 IN D L * ELECT RON IC DN74LS363/DN74LS363S LS TTL D N 7 4 L S '> U -X D N 7 4 L S 3 6 3 0? "Ví'07'OS' D N 7 4 L S 3 6 3 S Octal Transparent Latches with 3- state Outputs

Contextual Info: LS TTL DN74LS Series DN74LS266 DN74LS266 K 74us2££ Quad 2 -input Exclusive NOR Gates with Open C ollector Outputs) • Description P-1 D N 74LS266 contains four 2-input exclusive NOR gate circuits w ith open collector outputs. ■ Features • • • “W ired” AND capability