GVEN Search Results

F54 ONS

Contextual Info: P S H G E C PLESSEY ADVANCE INFORMATION DS3507-1.6 VP510 Bl DIRECTIONAL COLOUR SPACE CONVERTER DESCRIPTION FEATURES B B B B B B User definable colour space conversion Sampling rates up to 27 MHz On chip decimating or interpolating FIR filters Conversion from 24 bit inputs to 16 bit outputs or vice

mb502a

Contextual Info: December 1989 Edition 3.0 MB502A FUJITSU DATA SHEET ETHERNET ENCODER/DECODER ETHERNET ENCODER/DECODER The Fujitsu MB 5 0 2 A is an E th ern e t* Encoder/D ecoder designed to m eet all th e requirements o f the Ethernet Blue Book specifica­ tio n and fabricated w ith high-speed E C L and S c h o ttky T T L tech­

Contextual Info: fax id: 1079 CY62148 512K x 8 Static RAM an automatic power-down feature that reduces power con­ sumption by more than 99% when deselected. Featu res • 4.5V -5.5V operation • CMOS for optimum speed/power • Low active power Writing to the device is accomplished by taking chip enable

Contextual Info: CY7C1021 P Yi. PX :V«*1 64K x 16 Static RAM BLE is LOW, then data from I/O pins (l/0-| through l/0 8), is written into the location specified on the address pins (A0 through A i5). If byte high enable (BHE) is LOW, then data from I/O pins (l/Og through I/0 1 6) is written into the location speci­

Contextual Info: snigc FDC37M60X STANDARD MICROSYSTEMS CORPORATION 100 Pin Enhanced Super I/O Controller FEATURES • • • • • • • 5 Volt Operation PC97 Compliant ISA Plug-and-Play Compatible Register Set Intelligent Auto Power Management Shadowed Write-Only Registers for

Contextual Info: Advance‡ 128Mb: 8 Meg x 16 Mobile DDR SDRAM Features Mobile Double Data Rate DDR SDRAM MT46H8M16LF – 2 Meg x 16 x 4 Banks Features Figure 1: • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V • Bidirectional data strobe per byte of data (DQS) • Internal, pipelined double data rate (DDR)

F54 ONS

Contextual Info: VP510 M ITEL Bi Directional Colour Space Converter SEMICONDUCTOR A dvance Inform ation DS3507 - 1.6 September 1996 DESCRIPTION FEATURES • User definable colour space conversion ■ Sampling rates up to 27 MHz ■ On chip decimating or interpolating FIR filters

Contextual Info: fax id: 1075 CY7C1020V _ 3 2 K x 16 Static RAM BLE is LOW, then data from I/O pins (l/O-j through l/0 8), is written into the location specified on the address pins (A0 through A 14). If byte high enable (BHE) is LOW, then data from I/O pins (l/0 9 through l/O i6) is written into the location speci­

62128

Contextual Info: fax id: 1072 p yp: v « *1 X X CY62128 - 128K x 8 Static RAM fe a tu re th a t reduces pow er con sum p tion by m ore than 75% w h en deselected. Features • 4.5 V - 5.5 V o peratio n W riting to the device is acco m plishe d b y taking chip enable one ClE- and w rite enable (W E) inputs LO W and chip enab le

Contextual Info: fax id: 1083 C Y 7 C 1 0 2 1 V 3 0 64K X 16 Static RAM Writing to the device is accomplished by taking chip enable UE and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins ( l/0 1 through l/0 8), is written into the location specified on the address pins (A0

Contextual Info: VP 1995 510 FEBRUARY ADVANCE INFORMATION DS3507 - 1.5 VP510 BI DIRECTIONAL COLOUR SPACE CONVERTER FEATURES DESCRIPTION • User definable colour space conversion ■ Sampling rates up to 27 MHz ■ On chip decimating or interpolating FIR filters ■ Conversion from 24 bit inputs to 16 bit outputs or vice

Contextual Info: S i GEC PLESSEY ADVANCE INFORMATION SE MI CONDUCT ORS VP510 Bl DIRECTIONAL COLOUR SPACE CONVERTER FEATURES DESCRIPTION • User definable colour space conversion I Sampling rates up to 27 MHz I On chip decimating or interpolating FIR filters ■ Conversion from 24 bit inputs to 16 bit outputs or vice

etri converter

Abstract: "MELPS 740" MELPS 740 M37515 M37515M4-XXXHP MELPS 740 programming manual FFE81 S10STS MELPS-740 ScansUX59
Contextual Info: Technical Reference Materials P r e lim in a ry — -• — This product is under aevelooing -* The specification m ay be m odified witnout any notice M 3 7 5 1 5 M 4 -X X X H P Specification R e v is io n A 1996 A u g u st, 23 M IT S U B IS H I E L E C T R IC C O R P O R A T IO N

Contextual Info: M g o» « K Ob o QUALITY 5YM B0LS e T<3 V = ° G EN ERAL TO LERAN CES U N L E S S S P E C IF IE D 1N ÜFT 4 PLACES ± — ± — DMENSCN STYLE SCALE IN/MM 3:1 DRAWN BY <S IM0NS0 CHECKED BY 2 P L A C E S ± 0 .1 3 1 PL A C E + 0 . 2 5 AN G U LAR ± 1 '

HP Keyboard KB 0316

Abstract: kbc 1070 nu kbc 1070 HP Keyboard KB 0316 connector la-3261p G548A2 MAX8776 isl6260 820UE FCBGA-1299
Contextual Info: A B C D E 1 1 Compal confidential 2 2 Schematics Document Mobile Merom uFCPGA with Intel Crestline_PM+ICH8-M core logic 3 3 IBT00 LA-3261P UMA 2007-03-28 REV:1A MV2 4 4 Compal Secret Data Security Classification 2006/02/13 Issued Date 2006/03/10 Deciphered Date

CN0352

Abstract: WD-VP1 B288 CM06 U231
Contextual Info: CN0352 Digital CMOS Imager The Gonexant CN0352 Digital CM06 Imager DQ chip is one component of Conexant Universal Serial Bus (USB) camera system. It can also be used as a standalone device for various applications requiring a QF resolution imager. The

Contextual Info: CY7C1512 P YP V «*1 i. X 64K X 8 Static RAM and three-state drivers. This device has an automatic pow­ er-down feature that reduces power consumption by more than 75% when deselected. Features • High s p e e d Writing to the device is accomplished by taking chip enable

mc2674b4p

Contextual Info: MOTOROLA SEM ICONDUCTOR TECHNICAL DATA MC2674 Advance Information Advanced Video Display Controller AVDC T h e M C 2 6 7 4 a d v a n c e d v id e o d is p la y c o n t r o lle r (A V D C ) is a p r o g r a m m a b le d e v ic e d e s ig n e d fo r u s e in C R T t e r m in a ls a n d d is p la y s y s te m s th a t e m p lo y ra s te r-s c a n te c h n iq u e s . T h e A V D C g e n e ra te s

CCIR601

Abstract: VP2611 VP2615 VP510 VP520S
Contextual Info: VP 510 VP510 Bi Directional Colour Space Converter Advance Information DS3507 - 1.6 September 1996 FEATURES • User definable colour space conversion ■ Sampling rates up to 27 MHz ■ On chip decimating or interpolating FIR filters ■ Conversion from 24 bit inputs to 16 bit outputs or vice

OY62256-55RZC

Abstract: Y622 62256-70 62256-7 Y62256LL-55R 62256 RAM cy62256d
Contextual Info: C Y 62256 P YP v «*1 X X 32Kx8 Static RAM output enable Oh and three-state drivers. This device has an automatic power-down feature, reducing the power consum p­ tion by 98% when deselected. The CY62256 is in the standard 450-m il-wide (300-mil body width) SOIC, TSOP, and PDIP

1A8CN

Contextual Info: fax id: 1074 CY7C1020 3 2 K x 16 Static RAM BLE is LOW, then data from I/O pins (l/0-| through l/0 8), is written into the location specified on the address pins (A0 through A 14). If byte high enable (BHE) is LOW, then data from I/O pins (l/Og through l/0-|6) is written into the location speci­

CCIR-601

Contextual Info: VP 510 VP510 Bi Directional Colour Space Converter Advance Information DS3507 - 1.6 September 1996 FEATURES • User definable colour space conversion ■ Sampling rates up to 27 MHz ■ On chip decimating or interpolating FIR filters ■ Conversion from 24 bit inputs to 16 bit outputs or vice

30PFL

Contextual Info: fax id: 1077 CY7C1021V 64K X 16 Static RAM Writing to the device is accomplished by taking chip enable UE and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins ( l/0 1 through l/0 8), is written into the location specified on the address pins (A0

schematic diagram solar inverter

Abstract: solar pv microinverter schematic schematic diagram solar microinverter Solar Photovoltaic INVERTER wind inverter schematic diagram dc-ac inverter sensor solar inverters schematic diagram AS8002 off grid solar inverter solar inverters circuit diagram
Contextual Info: Preliminary Data Sheet AS8002 AS8002 Solar Photovoltaic Inverter Measurement IC with Fast Over Current Detection PRELIMINARY DATA SHEET 1. General Description 2. Key Features Power inverters in solar photovoltaic systems are often connected directly to the electricity grid in