GS9020 Search Results

composite to sdi converter

Contextual Info: * 1/,1; , GS9020A Serial Digital Video Input Processor DATA SHEET DESCRIPTION • fully compatible with SMPTE 259M The GS9020A is specifically designed to deserialize SMPTE 259M serial digital signals. The inclusion of Error Detection and Handling (EDH ensures the integrity of the data being

GS9020

Abstract: GS9020A GS9020ACFV GS9020ACFVE3 GS9020ACTV GS9020ACTVE3 GS9021 GS9035A
Contextual Info: GENLINX II GS9020A Serial Digital Video Input Processor DATA SHEET DESCRIPTION • fully compatible with SMPTE 259M The GS9020A is specifically designed to deserialize SMPTE 259M serial digital signals. The inclusion of Error Detection and Handling EDH ensures the integrity of the data being

S9020

Abstract: 594B
Contextual Info: GENNUM C O R P O R A T I OI M GENLINX I I GS9020 D jg jta | |n p u t P p0 c e s s 0 p PRELIMINARY DATA SHEET FEATURES DESCRIPTION fu lly com patible w ith SMPTE 259M operation to 540 MHz embedded EDH and data processing core re-serialized, EDH com pliant serial data output

GS9020

Abstract: single chip converter for ntsc to sdi ic GS9020-CFV GS9020-CTV GS9021 GS9025 GS9028
Contextual Info: GENLINX II GS9020 Serial Digital Video Input Processor DATA SHEET DESCRIPTION • fully compatible with SMPTE 259M The GS9020 is specifically designed to deserialize SMPTE 259M serial digital signals. The inclusion of Error Detection and Handling EDH ensures the integrity of the data being

Contextual Info: * 1/,1; , GS9020 Serial Digital Video Input Processor DATA SHEET DESCRIPTION • fully compatible with SMPTE 259M The GS9020 is specifically designed to deserialize SMPTE 259M serial digital signals. The inclusion of Error Detection and Handling (EDH ensures the integrity of the data being

CM23

Abstract: GS7025 GS9020 GS9024 GS9025A GS9028
Contextual Info: GS7025 PRO-LINX Serial Digital Receiver Key Features Description • SMPTE 259M-C compliant 270Mb/s • Automatic cable equalization (typically greater than 350m of high-quality cable) • Serial data outputs muted and serial clock remains active when input data is lost

SMPTE checkfield pattern

Abstract: GS9035-CPJ GS9020 GS9024 GS9035-CTJ LF15
Contextual Info: GENLINX II GS9035 Serial Digital Reclocker PRELIMINARY DATA SHEET DESCRIPTION • adjustment-free operation The GS9035 is a high performance clock and data recovery IC designed for serial digital data. The GS9035 receives either single-ended or differential PECL data and outputs

Contextual Info: GENNUM GENU NX n G S 9020 c o r p o r a t i o n Serial Digital Video Input Processor P R E L M H A R Y DA TA S H E E T FEATURES DESCRIPTION fully compatible with SMPTE 259M auto-standard operation to 540 MHz embedded EDH and data processing core selectable loop through or re-serialized EDH-processed

GS9002

Abstract: GS9020 GS9021 GS9021A GS9021ACFU GS9022 GS9032
Contextual Info: GENLINX II GS9021A EDH Coprocessor DATA SHEET DESCRIPTION • Error Detection and Handling EDH according to SMPTE RP-165 The GS9021A implements error detection and handling (EDH) according to SMPTE RP-165. Interfacing to the parallel inputs of either the GS9002, GS9022 or GS9032

GS9025

Abstract: GS9025A GS9025ACQM GS9025ACTM GS9028
Contextual Info: * 1/,1; , GS9025A Serial Digital Receiver DATA SHEET DESCRIPTION • SMPTE 259M compliant The GS9025A provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS9025A receives either single-ended or

SMPTE checkfield pattern

Contextual Info: GENLINX II GS9035A Serial Digital Reclocker PRELIMINARY DATA SHEET DESCRIPTION • adjustment-free operation The GS9035A is a high performance clock and data recovery IC designed for serial digital data. The GS9035A receives either single-ended or differential PECL data and

Contextual Info: GENLINX II GS9035 Serial Digital Reclocker PRELIMINARY DATA SHEET DESCRIPTION • adjustment-free operation The GS9035 is a high performance clock and data recovery IC designed for serial digital data. The GS9035 receives either single-ended or differential PECL data and outputs

SMPTE 1080p level a

Contextual Info: 0XOWL GEN GF9330 High Performance SDTV/HDTV Deinterlacer PRELIMINARY DATA SHEET DEVICE OVERVIEW • De-interlace, Pass-Through and Film Frame Rate Down Conversion modes of operation The GF9330 is a high performance VDSP engine that performs high quality de-interlacing of interlaced digital

Contextual Info: GENLINX II GS9035A Serial Digital Reclocker PRELIMINARY DATA SHEET DESCRIPTION • adjustment-free operation The GS9035A is a high performance clock and data recovery IC designed for serial digital data. The GS9035A receives either single-ended or differential PECL data and

GS9020

Abstract: GS9024 GS9035A GS9035ACPJ GS9035ACTJ LF15 SMPTE checkfield pattern EB9035A H2100
Contextual Info: GENLINX II GS9035A Serial Digital Reclocker DATA SHEET DESCRIPTION • adjustment-free operation The GS9035A is a high performance clock and data recovery IC designed for serial digital data. The GS9035A receives either single-ended or differential PECL data and

296M

Abstract: 1080PsF smpte 296m
Contextual Info: 0XOWL GEN GF9331 SDTV/HDTV Motion Co-processor PRELIMINARY DATA SHEET • seamless interface to Gennum’s GF9330 The GF9331 is a high performance motion co-processor that is used in conjunction with Gennum’s GF9330 SDTV/ HDTV De-interlacer. Together, the GF9331 and the GF9330

OEM44

Contextual Info: GENLINX II GS9025 Serial Digital Receiver PRELIMINARY DATA SHEET DESCRIPTION • SMPTE 259M compliant The GS9025 provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS9025 receives either single-ended or

Contextual Info: GENNUM G E N U N X " I I G S 9025 Serial Digital Receiver P R E L M Ï Ï A R Y DA TA S H E E T STANDARD FEATURES D ESC RIPTIO N The GS9025 provides automatic cable equalization and high fully com patible with SMPTE 259M and operational to 540 Mb/s autom atic cable equalization typically greater than

GS7025

Abstract: GS7025-CQM GS7025-CTM GS9020 GS9024 GS9025A GS9028
Contextual Info: 352/,1; GS7025 Serial Digital Receiver DATA SHEET DESCRIPTION • SMPTE 259M-C compliant 270Mb/s The GS7025 provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS7025 receives either single-ended or

P112H

Contextual Info: MultiG E N GF91 0 5 A Component Digital Transcoder GENNUM A T I N P R E L M B A R Y DATA SHEET FEATURES DEVICE OVERVIEW • drop in replacement fo r the GF9105 w ith lower power and increased fu n ctio n a lity The GF9105A is a drop in replacem ent for the GF9105 with

S9020

Contextual Info: GENNUM corporati □ N GENLINX IIG S 9021 EDHCoprocessor PRELIMINARY DATA SHEET FEATURES Error Detection and Handling EDH according to SMPTE RP-165 EDH insertion and extraction in one device auto-standard operation with override via host interface noise immune extraction of HVF timing signals

GF9330

Abstract: GF9330-CBP GF9331 GS9021 ieee format for w16 engine SMPTE 296M smpte 274m image enhancer
Contextual Info: 0XOWL GEN GF9330 High Performance SDTV/HDTV Deinterlacer PRELIMINARY DATA SHEET DEVICE OVERVIEW • De-interlace, Pass-Through and Film Frame Rate Down Conversion modes of operation The GF9330 is a high performance VDSP engine that performs high quality de-interlacing of interlaced digital

gennum clock data recovery

Abstract: GS9025 GS9025A GS9025ACQM GS9025ACTM GS9028 SMPTE259M ECL 300
Contextual Info: GENLINX II GS9025A Serial Digital Receiver PRELIMINARY DATA SHEET DESCRIPTION • SMPTE 259M compliant The GS9025A provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS9025A receives either single-ended or

GS9025ACQME3

Abstract: GS9025 GS9025A GS9025ACQM GS9025ACTM GS9028 292D
Contextual Info: GENLINX II GS9025A Serial Digital Receiver DATA SHEET DESCRIPTION • SMPTE 259M compliant The GS9025A provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS9025A receives either single-ended or