GS8320E18T166 Search Results

GS8320E18T-133

Abstract: GS8320E18T-150 GS8320E18T-166 GS8320E18T-200 GS8320E18T-225 GS8320E18T-250 GS8320E32T-150 GS8320E32T-166 GS8320E32T-200 GS8320E32T-225
Contextual Info: Preliminary GS8320E18/32/36T-xxxV 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features 250 MHz–133 MHz 1.8 V or 2.5 V VDD 1.8 V or 2.5 V I/O Burst mode, subsequent burst addresses are generated internally and are controlled by ADV. The burst address

Contextual Info: GS8320E18/32/36T-250/225/200/166/150/133 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features Functional Description ct Flow Through/Pipeline Reads The function of the Data Output register can be controlled by

GS8320E18

Abstract: GS8320E18T-166 GS8320E18T-200 GS8320E18T-225 GS8320E18T-250 GS8320E32 GS8320E36 GS8320E18T166
Contextual Info: Preliminary GS8320E18/32/36T-250/225/200/166/150/133 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O interleave order with the Linear Burst Order LBO input. The

K7A803609B-PC25

Abstract: K7A403600B-PC16 K7I161882B-EC16 K6R4016V1D-TC08 K7A403600M-QC16 K7I161882B-EC30 K6R4008V1C-JC12 K6R4016V1D-UC10 K6R1008V1C-JC10 K7R643682M-FC20
Contextual Info: SAMSUNG # - Connect pin 14 FT pin to Vss * - Tie down extra four I/Os with resistor K6R1016V1C-FC10 K6R1016V1C-FC12 K6R1016V1C-FC15 K6R1016V1C-FC20 K6R1016V1C-JC10 K6R1016V1C-JC12 K6R1016V1C-JC15 K6R1016V1C-JC20 K6R1016V1C-TC10 K6R1016V1C-TC12 K6R1016V1C-TC15

GS8320E18

Abstract: GS8320E18T-200 GS8320E18T-225 GS8320E18T-250 GS8320E32 GS8320E36
Contextual Info: Product Preview GS8320E18/32/36T-250/225/200/166/150/133 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features on every cycle with no degradation of chip performance. • FT pin for user-configurable flow through or pipeline

CY7C1338-100AXC

Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
Contextual Info: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12

Contextual Info: Preliminary GS8320E18/32/36T-xxxV 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features 250 MHz–133 MHz 1.8 V or 2.5 V VDD 1.8 V or 2.5 V I/O Burst mode, subsequent burst addresses are generated internally and are controlled by ADV. The burst address

Contextual Info: GS8320E18/32/36T-xxxV 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features 250 MHz–133 MHz 1.8 V or 2.5 V VDD 1.8 V or 2.5 V I/O Burst mode, subsequent burst addresses are generated internally and are controlled by ADV. The burst address

Contextual Info: GS8320E18/32/36T-xxxV 250 MHz–133 MHz 1.8 V or 2.5 V VDD 1.8 V or 2.5 V I/O 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features Functional Description ct DCD Pipelined Reads The GS8320E18/32/36T-xxxV is a DCD Dual Cycle

GS8320E18

Abstract: GS8320E18T-166 GS8320E18T-200 GS8320E18T-225 GS8320E18T-250 GS8320E32 GS8320E36
Contextual Info: GS8320E18/32/36T-250/225/200/166/150/133 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features interleave order with the Linear Burst Order LBO input. The

GS8320E18T-133

Abstract: GS8320E18T-150 GS8320E18T-166 GS8320E18T-200 GS8320E18T-225 GS8320E18T-250 GS8320E32T-150 GS8320E32T-166 GS8320E32T-200 GS8320E32T-225
Contextual Info: GS8320E18/32/36T-xxxV 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features 250 MHz–133 MHz 1.8 V or 2.5 V VDD 1.8 V or 2.5 V I/O Burst mode, subsequent burst addresses are generated internally and are controlled by ADV. The burst address