GR1244CORE Search Results

4064 pll

Abstract: NSA3438A NSA3438B NW50M50LA NW50M50LB
Contextual Info: Crystal Oscillator Model Name NW50M50LA/B Frequency Controlled Crystal Oscillator FCXO Stratum3 Module • Main Application SONET, SDH, FTTH, Communications equipment ■ Features ● Two reference input frequencies in 9 steps from 8 kHz to 77.76 MHz. ● Compliant with Telecordia GR1244CORE, GR253.

Contextual Info: Crystal Oscillator Model Name NW50M50LA/B Frequency Controlled Crystal Oscillator FCXO Stratum3 Module • Main Application SONET, SDH, FTTH, Communications equipment ■ Features ● Two reference input frequencies in 9 steps from 8 kHz to 77.76 MHz. ● Compliant with Telecordia GR1244CORE, GR253.

4064 pll

Contextual Info: Crystal Oscillator Frequency Controlled Crystal Oscillator FCXO Stratum3 Module Model Name NW50M50LA/B n Main Application SONET, SDH, FTTH, Communications equipment n Features l Two reference input frequencies in 9 steps from 8 kHz to 77.76 MHz. l Compliant with Telecordia GR1244CORE, GR253.

NW50M50LA

Abstract: NW50M50LB NSA3438A NSA3438B CRYSTAL 2.048 MHz
Contextual Info: Crystal Oscillator Frequency Controlled Crystal Oscillator FCXO Stratum3 Module Model Name NW50M50LA/B n Main Application SONET, SDH, FTTH, Communications equipment n Features l Two reference input frequencies in 9 steps from 8 kHz to 77.76 MHz. l Compliant with Telecordia GR1244CORE, GR253.

silec

Abstract: GR-1244-CORE OC192 Si5364 Si536
Contextual Info: Si5364 SONET/SDH P R E C I S I O N P O R T C A R D C L O C K IC Features Ultra-low jitter clock outputs with jitter generation as low as 0.3 psRMS No external components other than a resistor and standard bypassing Up to three clock inputs Four independent clock outputs at 19,

R4383

Abstract: T400 clock TSWC03622 TSYN01622 TSYN03622 TSWC01622 TSWC02622
Contextual Info: Advisory October 28, 2003 TSWC01622/TSWC02622/TSWC03622/TSYN01622/TSYN03622 Device Version 1.1 Advisory The following data sheets are to be referenced: • TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS03-117HSPL-1 . ■

Contextual Info: TX-508 Temperature Compensated Crystal Oscillator Low G-Sensitivity Preliminary TX-508 Features Applications Low G-Sensitivity High shock resistance Vibration hardened Tight Tolerances Low Phase Noise • Vibration Environment • Portable Equipment • Land Mobile Radio

82V3288

Abstract: BC208 transistor GR-1244-CORE GR-253-CORE IDT82V3288
Contextual Info: WAN PLL IDT82V3288 Version 2 June 22, 2006 6024 Silver Creek Valley Road, San Jose, CA 95138 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 284-2775 Printed in U.S.A. 2006 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry

Nx62

Abstract: DS3100 DS3104GN DS3104-SE GR-1244-CORE GR-253-CORE GR-499-CORE
Contextual Info: Rev: 072407 DS3104-SE Line Card Timing IC with Synchronous Ethernet Support General Description The DS3104-SE is a low-cost, feature-rich timing IC for line cards with synchronous Gigabit Ethernet GbE , 10-Gigabit Ethernet (10GbE), and Fast Ethernet ports.

DS3100

Abstract: DS3105 DS3105LN GR-1244-CORE GR-253-CORE LQFP64 MCR10 ACS8525 MCR10 ROHS D1801
Contextual Info: Preliminary. Subject to Change Without Notice. PRELIMINARY DATASHEET DS3105 Line Card Timing IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3105 is a low-cost, feature-rich timing IC for telecom line cards. Typically the device accepts two reference clocks from dual redundant system timing

ACS8510

Abstract: GR-1244 GR-1244-CORE GR-253-CORE T010
Contextual Info: ACS8510 Rev2.1 SETS Synchronous Equipment Timing Source for SONET or SDH Network Elements FINAL ADVANCED COMMUNICATIONS Description Features The ACS8510 is a highly integrated, single-chip solution for the Synchronous Equipment Timing Source SETS function in a SONET or SDH Network Element. The device generates SONET or

Contextual Info: TX-508 Temperature Compensated Crystal Oscillator Low G-Sensitivity TX-508 Features Applications Low G-Sensitivity Vibration hardened Tight Tolerances Low Phase Noise Frequency Range1: 10 - 100 MHz • Vibration Environment • Portable Equipment • Land Mobile Radio

TX-801

Contextual Info: TX-801 Temperature Compensated Crystal Oscillator TX-801 Description The TX-801 TCXO provides fully compliant Stratum 3 levels of stability in a 5x2.3mm package. It is ideal for timing over IP Features Applications applications such as 1588 PTP and Synchronous Ethernet.

Contextual Info: 8798_AA's Vectron 05/30/02 3:12 PM Page 105 Timing Module TM is the clocks and the controlling circuitry in a Network Element that are needed to meet the requirements of GR-1244-CORE Issue 2 (GR-1244). Below is a block diagram taken from GR-1244 showing where a TM is

Contextual Info: áç XRT85L61 PRELIMINARY BITS BUILDING INTEGRATED TIMINING SUPPLY CLOCK EXTRACTOR NOVEMBER 2002 REV. P1.0.2 • Supports 75Ω and 120Ω (E1), 100Ω (T1) applica- GENERAL DESCRIPTION The XRT85L61 is an integrated E1, T1, 64KHz Centralized Clock interface for T1 (1.544Mbps) 100Ω,

pc toTv BOX Diagram

Abstract: ZL50117GAG2 ZL50116GAG ZL50117GAG ZL50118GAG ZL50119GAG ZL50120GAG ZL50110 ZL50111 ZL50112
Contextual Info: ZL50115/16/17/18/19/20 32, 64 and 128 Channel CESoP Processors Data Sheet Features March 2009 Ordering Information General • Circuit Emulation Services over Packet CESoP transport for MPLS, IP and Ethernet networks • On chip timing & synchronization recovery across

siemens Logo 230 rc manual

Abstract: GR-1244-CORE MT9044 MT9044AL MT9044AP TR62411
Contextual Info: MT9044 T1/E1/OC3 System Synchronizer Data Sheet Features November 2003 • Supports AT&T TR62411 and Bellcore GR-1244CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces

tm028

Abstract: QTH-030-03-H-D-A QSH-030-01-H-D-A ACS8510 GR-1244-CORE GR-253-CORE STS-101 Intel Core i3
Contextual Info: STS-101 Synchronous Timing Module 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com Features • Suitable for Stratum 3 and 4 SONET or SDH Equipment Clocks SEC applications • Supports six TTL/CMOS inputs and two BITS

C-MAC MicroTechnology

Abstract: 51.84 mhz xo oscillator GR-1244-CORE Datasheet, Circuit Cross Refer PH ON 823 GR-253 GR-253-CORE
Contextual Info: ACS8522A SETS LITE Synchronous Equipment Timing Source for Stratum 3/4E/4 and SMC Systems COMMUNICATIONS ADVANCED COMMS & SENSING Description FINAL Features The ACS8522A is a highly integrated, single-chip solution for the Synchronous Equipment Timing Source SETS function in a

ty 612

Abstract: PJ 3139
Contextual Info: PMC-Sierra, Inc. ADVANCE PM5313 SPECTRA-622 DATA SHEET PMC-981162 ISSUE 2 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATA SHEET PROPRIETARY AND CONFIDENTIAL ADVANCE ISSUE 2: MAY 1999

SI 1150H

Abstract: xnxx 1155H 16 x E1 G.703 MP 9720 ds yt 1208 diode 1N311
Contextual Info: PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATA SHEET PRELIMINARY ISSUE 3: OCTOBER 1999 Proprietary and Confidential to PMC-Sierra Inc., and for its Customers’ Internal Use REVISION HISTORY Issue No. Issue Date Details of Change

1N07

Abstract: relay cross reference z570 1062H
Contextual Info: PMC-Sierra, Inc. PRELIMINARY PM5313 SPECTRA-622 DATA SHEET PMC-1981162 ISSUE 4 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATA SHEET PRELIMINARY ISSUE 4: FEBRUARY 2000 Proprietary and Confidential to PMC-Sierra Inc., and for its Customers’ Internal Use

ACS8510

Abstract: ACS8520 ACS8522 ACS8530 ACS8946 GR-253
Contextual Info: ACS8946 JAM PLL Jitter Attenuating, Multiplying Phase Locked Loop, with Protection Switch, for OC-12/STM-4 and GbE ADVANCED COMMUNICATIONS Introduction FINAL Features The ACS8946 JAM PLL is a Jitter-Attenuating, Multiplying differential Phase-Locked Loop, for generating low jitter

ACS9510

Abstract: icp multiplexer 24 pin ACS8510 ACS8520 ACS8522 ACS8525 ACS8530 ACS8947T QFN48
Contextual Info: ACS8947T JAM PLL Jitter Attenuating, Multiplying Phase-Locked Loop with Automatic Input Switch and Data Resynchronization Path COMMUNICATIONS ADVANCED COMMS & SENSING Introduction FINAL Features The ACS8947T JAM PLL is a general pupose, Integer N, jitter-attenuating, differential phase-locked loop for