G12 DDR LSI Search Results

ddr phy

Abstract: rapidchip LSI coreware library DDR PHY ASIC CW108005 L79301 OC192 LSI Rapidchip Gigablaze serdes CMOS LSI gigablaze serdes
Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while

L69301

Abstract: L6930 LSI Rapidchip g12 transistor
Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while

ba05 regulator

Abstract: transistor code ak31 transistor BA29 AU04 3M RC7301 ba05 hp invent j04 RC1800 LSI Rapidchip 2aw22
Contextual Info: DATASHEET RC79301 StreamSlice Platform ASIC July 2003 Preliminary DB08-000235-00 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using

RC1800

Abstract: 736-pin FC54 ddr phy LSI Rapidchip ARM926 "user manual" LSI gigablaze serdes DDR PHY ASIC LSI coreware library ARM926
Contextual Info: DATASHEET RC1800 Foundation Slice Family April 2003 Advance DB14-000253-02 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.

736-Pin

Abstract: LSI coreware library 64X144
Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family July 2005 The RapidChip RC1800 Foundation Platform ASIC Family, except for the RC1812 slice, is in NO-NEW-DESIGN Status as of July 2005. LSI Logic is not accepting new designs in this slice Family. Information in this datasheet is

ARM926

Abstract: DDR PHY ASIC LSI gigablaze serdes RC1800 LSI Rapidchip DDR1 RAM drawing rc1870 LSI Logic G12
Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family October 2003 DB14-000253-03 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.

lsi gigablaze transceiver

Abstract: LVTTL25
Contextual Info: DATASHEET RC11XT531 RapidChip Platform ASIC December 2003 Advance DB08-000236-01 This document is advance. As such, it describes a product under development. This information is intended to help you evaluate the product. LSI Logic reserves the right to change or discontinue this proposed product without notice.

ProASIC PLUS v0.1

Abstract: AGL015
Contextual Info: v1.2 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

AGL015

Abstract: AGL400 FG144 QN132 VQ100 ProASIC3
Contextual Info: v1.5 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and

BB 209

Abstract: AGL015
Contextual Info: v1.4 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and

AGL400

Abstract: FG144 QN132 VQ100 AGL060 AGL015
Contextual Info: v1.3 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

IO118VDB3

Abstract: AGL015
Contextual Info: v1.4 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and

Contextual Info: v1.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core and I/O Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

AGL015

Contextual Info: Product Brief 1 – IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core and I/O Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Contextual Info: IGLOO Datasheet Product Brief 1 – IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Datasheet AGLN020

Abstract: FG144 QN132 VQ100 IO45PDB1 AGL015
Contextual Info: v2.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS

IO222

Abstract: AGL015
Contextual Info: v1.1 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

AGL015

Contextual Info: v1.1 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

br 8892

Contextual Info: IGLOO Datasheet P ro du c t Br ie f 1 – IGLOO™ Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation

Contextual Info: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

130nm CMOS

Abstract: gl 1000 IO98PPB3 semi catalog
Contextual Info: Revision 20 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Contextual Info: IGLOO Datasheet P ro du c t Br ie f 1 – IGLOO™ Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation

AGL015

Abstract: FG144 FG256 FG484 QN132 VQ100 AGL1000-FG484
Contextual Info: Revision 18 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Contextual Info: IGLOO Datasheet Product Brief 1 – IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode