LS528
Abstract: LS527
Contextual Info: TYPES SN54ALS526, SN54ALS527, SN54ALS528 SN74ALS526. SN74ALS527, SN74ALS528 FUSE-PROGRAMMABLE IDENTITY COMPARATORS D2826, DECEMBER 1983 Can Be Programmed and Verified on Most Incoming Test Equipment Programming Capabilities 'ALS526 — Fuse Programmable 16-Bit
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sn54als526sn54als527sn54als528sn74als526+8sn74als527sn74als528d2826als52616-bitals527ls528ls527
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AM29PL141
Abstract: 29PL141 Am29100
Contextual Info: Am29PL141 A m 29PL141 Fuse Programmable Controller FPC ADVANCED INFORMATION DISTINCTIVE CHARACTERISTICS Implements complex fuse programmable state ma chines 64 words of 32-bit-wide microprogram memory Serial Shadow Register (SSRaTM>) Hio diagnostics on chip
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am29pl14129pl14132-bit-wide20mhz+3am2914am2910004179b
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gmoc
Abstract: Am29PL141
Contextual Info: Am29PL141 Am29PL141 Fuse Programmable Controller FPC DISTINCTIVE CHARACTERISTICS Implements complex fuse programmable state ma chines 7 conditional inputs, 16 outputs 64 words of 32-bit-wide microprogram memory q TM>) diagnostics Hionn Serial Shadow Register (SSR
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am29pl14132-bit-wide28-pinam28pl141+5wfr02791wfr02660icr00533icr00524gmoc
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29PL141
Contextual Info: A m 29P L 141 Fuse Programmable Controller FPC Distinctive Characteristics • • • • • Implements complex fuse programmable state ma chines 7 conditional inputs. 16 outputs 64 words of 32-bit-wide microprogram memory Serial Shadow Register (SSR ) diagnostics on chip
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32-bit-wide28-pinam29pl141wfr02791+4wfr02680icr00533icr0052429pl141
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socket amd FM2
Abstract: amd socket fm2
Contextual Info: A m 29P L 141 Fuse Programmable C ontroller FPC Distinctive Characteristics • • • • • Implements complex fuse programmable state ma chines 7 conditional inputs. 16 outputs 64 words ot 32-bit-wide microprogram memory Serial Shadow Register (SSR ) diagnostics on chip
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32-bit-wide28-pinam29pl141wfr02791+5wfr02680icr00533icr00524socket amd fm2amd socket fm2
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RCT5 rn
Abstract: d-latch by using D flip-flop 7474 7474 counter circuit diagram I18N 8 bit barrel shifter
Contextual Info: Philips Components-Signetics Designing with Programmable Macro Logic Program m able Logic Devices INTRODUCTION TO PML DESIGN CONCEPTS Programmable Macro Logic, an extension of the Programmable Logic Array PLA concept combines a programming or fuse array with
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plhs501rct5 rnd-latch by using d flip-flop 74747474 counter circuit diagram+2i18n8 bit barrel shifter
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SN54ALS526
Abstract: SN54ALS527 SN54ALS528 SN74ALS526 SN74ALS527 SN74ALS528 Fuse-Programmable PROM
Contextual Info: SN54ALS526, SN54ALS527, SN54ALS528 SN74ALS526, SN74ALS527, SN74ALS528 FUSE-PROGRAMMABLE IDENTITY COMPARATORS SDAS051A – JUNE 1994 – REVISED MAY 1986 High-Speed Address Recognition Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers,
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sn54als526sn54als527sn54als528sn74als526+5sn74als527sn74als528sdas051a300-milfuse-programmable prom
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Fuse-Programmable PROM
Abstract: P932 SN54ALS526 SN54ALS527 SN54ALS528 SN74ALS526 SN74ALS527 SN74ALS528 VIHH
Contextual Info: SN54ALS526, SN54ALS527, SN54ALS528 SN74ALS526, SN74ALS527, SN74ALS528 FUSE-PROGRAMMABLE IDENTITY COMPARATORS SDAS051A – JUNE 1994 – REVISED MAY 1986 High-Speed Address Recognition Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers,
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sn54als526sn54als527sn54als528sn74als526+7sn74als527sn74als528sdas051a300-milfuse-programmable promp932vihh
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AZ2A
Contextual Info: TBP3BR165, TBP38R16X 16,384-BIT 2048 WORDS BY 8 BITS REGISTERED PROGRAMMABLE READ-ONLY MEMORIES D2902, OCTOBER 1985 • Fastest Schottky PROM Family • High-Speed Access Times • Allows Storage of Output Data • Titanium-Tungsten (Ti-W ) Fuse Links for
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SN74S188
Abstract: SN74S287 SN74188 SN74186 sn74S287 programming SN74S288 SN74S471 SN74188AJ SN74S470 SN74S471 16 pin
Contextual Info: TTL MEMORIES SERIES 54/74. 54S/74S PROGRAMMABLE READ-ONLY MEMORIES BULLETIN NO. DL-S 7512258, MAY 1975 • Full Decoding and Chip Select Simplify System Design Titanium-Tungsten Ti-W Fuse Links for • Fast, Low-Voltage, Reliable Programming All Schottky-Clamped PROM's Offer:
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54s/74ssn54186sn74s188sn74s287+8sn74188sn74186sn74s287 programmingsn74s288sn74s471sn74188ajsn74s470sn74s471 16 pin
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TBP28L22
Abstract: fA1023 TBP24S10 TBP24S41 TBP24SA10 TBP24SA41 TBP28S42 TBP28S46 TBP28SA42 TBP28SA46
Contextual Info: SERIES 24 AND 28 STANDARD AND LOW POWER PROGRAMMABLE READ-ONLY MEMORIES SEPTEMBER 1979-REVISED AUGUST 1984 • Expanded Family of Standard and Low Power PROMs • P-N-P Inputs for Reduced Loading On System Buffers/Drivers • Titanium-Tungsten Ti-W Fuse Links for
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LT718
Contextual Info: SERIES 24 AND 28 STANDARD AND LOW POWER PROGRAMMABLE READ ONLY MEMORIES SEPTEMBER 1979-REVISED AUGUST 1984 • Expanded Family of Standard and Low Power PROMs • P-N-P Inputs for Reduced Loading On System Buffers/Drivers • Titanium-Tungsten Ti-W Fuse Links for
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as 15-hg
Abstract: A1023 Y TBP28L22 a1023 TBP24S10 TBP24S41 TBP24SA10 TBP24SA41 TBP28S42 TBP28S46
Contextual Info: SERIES 24 AND 28 STANDARD AND LOW POWER PROGRAMMABLE READ ONLY MEMORIES SEPTEMBER 1979-RE VIS E D AUGUST 1984 Expanded Family of Standard and Low Power PROMs • P-N-P Inputs for Reduced Loading On System BuffersyDrivers Titanium-Tungsten Ti-W Fuse Links for
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1979-revisedas 15-hga1023 ytbp28l22+7a1023tbp24s10tbp24s41tbp24sa10tbp24sa41tbp28s42tbp28s46
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UNITED TECHNOLOGIES MICROELECTRONICS CENTER
Abstract: ut28f256 Mtl-Std-883 United Technologies Microelectronics
Contextual Info: D E C '08 ’93 05:28PM UNITED P. 2/8 Military Standard Products UT28F256 Radiation-Hardened 32K x 8 PROM Product Brief UNITED TECHNOLOGIES MICROELECTRONICS CENTER November 1993 llilllllllM FEATURES □ Amorphous, programmable, non-volatile silicon anti-fuse read-only asynchronous, radiationhardened, 32Kx 8 memory
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16L8-25
Abstract: PAL16L8A-4 pal16l8b 20B-pin pal16r8a-2 16R4 B1036 PAL 007 B pal14h4 16l8
Contextual Info: Military 20-Pin PAL D evices Features Applications • Register and combinatorial outputs • Variety of speed/power options • Registers with feedback • Programmable three-state outputs • Security fuse prevents duplication of logic • Through-hole or surface mount device packaging
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tbp24s10
Contextual Info: SERIES 24 AND 28 STANDARD AND LOW POWER PROGRAMMABLE READ ONLY MEMORIES SEPTEMBER 1979-R E V IS E D AU G U ST 1984 • Expanded Family of Standard and Low Power PROMs • P-N-P Inputs for Reduced Loading On System Buffers/Drivers • Titanium-Tungsten Ti-W Fuse Links for
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ACTEL fpga
Contextual Info: The Actel Extender is a Secure Solution The antifuse and flash circuits that determine the configuration of Actel’s programmable devices are extremely secure because it is difficult to establish precisely how they are arranged in the silicon. The very small fuse elements and flash cells
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TBP18S030
Abstract: TBP18S030MJ TBP18SA030 TBP18SA030MJ 74 family
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ ONLY MEMORIES SCHOTTKY PROMS S E PTEM BE R 1 9 7 9 - R E V IS E D A U G U S T 1 9 8 4 • Titanium-Tungsten (Ti-W) Fuse Link for Reliable Low-Voltage Full Family Compatible Programming •
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16H8
Abstract: AMD 16L8 AMPAL16H8 16a8 AmPAL16R6 AMPAL16L8/BRA AmPAL16R8 16LD8 TFK S 417 T pAL programming Guide
Contextual Info: AmPAL*16XX Family 20-Pin IMOX Programmable Array Logic PAL Elements PRELOAD feature perm its full logical verification Reliability assured through m ore than 70 billion fuse hours o f life testing w ith no failures Full AC and DC param etric testing at the factory through
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7265-PC-0002
Abstract: 21554 CHN 623 Diodes Vantis ISP cable 208pin PQFP L1210 eeprom programmer schematic 74ls244 MACH445 teradyne 93-009-6105-JT-01
Contextual Info: 11 CHAPTER 1 Chapter 1 Introduction What is In-System Programming ISP ? Before In-System Programming (ISP) was developed, programming complex programmable logic devices (CPLDs) was a tedious process. After creating the JEDEC fuse map files with design automation software, designers or manufacturing engineers have to insert the CPLDs into
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CHN 623 Diodes
Abstract: MACHpro vantis jtag schematic module bsm 25 gp 120 MACH445 MACH Programmer 7265 L1210 mach 1 family amd CHN 623 diode BSM 225
Contextual Info: 11 CHAPTER 1 Chapter 1 Introduction What is In-System Programming ISP ? Before In-System Programming (ISP) was developed, programming complex programmable logic devices (CPLDs) was a tedious process. After creating the JEDEC fuse map files with design automation software, designers or manufacturing engineers have to insert the CPLDs into
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chn 623 diodesmachprovantis jtag schematicmodule bsm 25 gp 120+6mach445mach programmer 7265l1210mach 1 family amdchn 623 diodebsm 225
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pal8l14
Abstract: PAL20L8A-2 20L8-25
Contextual Info: M ilita ry 24-P in PAL D ev ic es Features Benefits • • • • • • • • • • • • • • • • • • • Registers with feedback Programmable three-state outputs Security fuse prevents duplication of logic Variety o f speed/power options available In same archi
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p18s0
Abstract: 18S030 texas 18s
Contextual Info: TBP18S030, TBP1BSA030 256 BIT S 32 W ORDS BY 8 BITS PROGRAMMABLE READ ONLY M EM O R IES SCHOTTKY PR O M S SEPTEMBER 1 9 7 9 -R E V IS E D AU G U S T 1 9 8 4 • • • • • Titanium-Tungsten (Ti-W) Fuse Link for Reliable Low-Voltage Full Family Compatible
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conversion software jedec lattice
Abstract: ieee 1532 ISP ispDOWNLOAD Cable lattice sun ispVM checksum 2032VE 2064VE 22LV10 ispMACH 4A3 teradyne tester test system isp MACH 4A3
Contextual Info: In-System Programming Usage Guidelines for ispJTAG Devices February 2002 Introduction Once a design has been compiled to a JEDEC file and device programming is necessary, the fuse map data must be serially shifted into the device along with the appropriate addresses and commands. Traditionally, programmable logic devices have been programmed on PLD/PROM programmers, so the programmer generates all the programming signals and algorithms. The programmer also generates the external super voltage or high voltage
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1-800-latticeconversion software jedec latticeieee 1532 ispispdownload cable lattice sun+7ispvm checksum2032ve2064ve22lv10ispmach 4a3teradyne tester test systemisp mach 4a3
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