FULL DECODER Search Results

Dual Port V-RAM

Abstract: vram dual port
Contextual Info: Half SAM and Full SAM Compatibility Applications Note Half SAM and Full SAM Compatibility -Half Sam and Full Sam Compatibility bility 9 Column Decoders 16 16 Sense Amplifiers 512 Refresh Counter 9 512 8 512 x 512 x 16 Dram Array 128 128 Lower Transfer Gate

Contextual Info: HY62SF16100C Series 64Kx16bit full CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62SF16100C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62SF16100C uses high performance full CMOS process technology

Contextual Info: HY62QF16100C Series 64Kx16bit full CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62QF16100C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62QF16100C uses high performance full CMOS process technology

Contextual Info: Full Duplex 84C24 Quad 10Base-T Ethernet Media Interface Adapter Technology Incorporated PRELIMINARY June 18, 1996 SEEQ Full Duplex Designation Note: Check for latest Data Sheet revision before starting any designs. Full Duplex Call SEEQ Technology 510 226-7400 x3051.

Contextual Info: HY62SF16101C Series 64Kx16bit full CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62SF16101C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62SF16101C uses high performance full CMOS process technology

SM-1994

Contextual Info: HY62UF16101C Series 64Kx16bit full CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62UF16101C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62UF16101C uses high performance full CMOS process technology

ep3C5

Abstract: R8051XC
Contextual Info:  Support for Full and Low Speed operation according to the USB 2.0 specification  Generic system bus interface USBFS-DEV  Serial Interface Engine USB Full-Speed Device Controller Megafunction Support full speed devices Extraction clock and data signals

84C24

Abstract: xmtd ST4178
Contextual Info: Full Duplex 84C24 84C24 Quad 10Base-T Ethernet Media Interface Adapter Technology Incorporated June 18, 1996 PRELIMINARY SEEQ Full Duplex Designation Note: Check for latest Data Sheet revision before starting any designs. Full Duplex Call SEEQ Technology 510 226-7400 x3051.

NQ83C95

Abstract: 83C95 seeq 8023 Xfmr200 10BASET 20MHZ 83C94 AM79C100 EPE6047S PT4152
Contextual Info: Full Duplex Technology Incorporated 10BASE-T Ethernet Transceiver With On Chip Filters And AUI September 9, 1996 PRELIMINARY SEEQ Full Duplex Designation Note: Check for latest Data Sheet revision before starting any designs. Full Duplex Call SEEQ Technology 510 226-7400 x3051.

C8051F326-GM

Abstract: "USB" peripheral
Contextual Info: C8051T622/623/326/327 Full Speed USB EEPROM MCU Family USB Function Controller High-Speed 8051 µC Core - - - USB specification 2.0 compliant Full speed 12 Mbps or low speed (1.5 Mbps) operation Integrated clock recovery; no external oscillator required for full speed or

Contextual Info: HY62SF16201A Series 128Kx16bit full CMOS SRAM DESCRIPTION FEATURES The HY62SF16201A is a high speed, low power and 2M bit full CMOS SRAM organized as 131,072 words by 16bit. The HY62SF16201A uses high performance full CMOS process technology and designed for high speed low

R8051XC

Abstract: TSMC 90nm 80C51 R8051XC2
Contextual Info: Support for Full and Low Speed operation according to the USB 2.0 specification USBFS-DEV USB Full-Speed Device Controller Core Generic system bus interface Serial Interface Engine o Support full speed devices o Extraction clock and data sig- nals in internal DPLL

R8051XC

Abstract: usbfs-5 3S1600E
Contextual Info:  Support for Full and Low Speed operation according to the USB 2.0 specification  Generic system bus interface USBFS-DEV  Serial Interface Engine USB Full-Speed Device Controller Core  Support full speed devices  Extraction clock and data sig-

34017

Abstract: SAA5252 SAA5252P SAA5252T
Contextual Info: Philips Semiconductors Product specification Line twenty-one acquisition and display LITOD SAA5252 FEATURES Complete ‘stand-alone’ Line 21 decoder in one package On-chip display RAM allowing full page Text mode Enhanced character display modes Full colour captions

Contextual Info: HY62SF16803A Series 512Kx16bit full CMOS SRAM Preliminary DESCRIPTION FEATURES The HY62SF16803A is a high speed, super low power and 8Mbit full CMOS SRAM organized as 524,288 words by 16bits. The HY62SF16803A uses high performance full CMOS process technology and is designed for high speed and

Contextual Info: HY62QF16100 Series 64Kx16bit full CMOS SRAM DESCRIPTION FEATURES The HY62QF16100 is a high speed, low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62QF16100 uses high performance full CMOS process technology and designed for high speed low power circuit

Contextual Info: HY62UF16100C Series 64Kx16bit full CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62UF16100C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62UF16100C uses high performance full CMOS process technology and designed for high speed low

hy62uf8100-i

Abstract: REV08 hy62uf8100
Contextual Info: HY62UF8100 Series 128Kx8bit full CMOS SRAM DESCRIPTION FEATURES The HY62UF8100 is a high speed, low power and 1M bit full CMOS SRAM organized as 131,072 words by 8bit. The HY62UF8100 uses high performance full CMOS process technology and designed for high speed low power circuit

Contextual Info: HY62QF16101C Series 64Kx16bit full CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62QF16101C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62QF16101C uses high performance full CMOS process technology and designed for high speed low

Contextual Info: HY62SF16100 Series 64Kx16bit full CMOS SRAM DESCRIPTION FEATURES The HY62SF16100 is a high speed, low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62SF16100 uses high performance full CMOS process technology and designed for high speed low power circuit

Contextual Info: HY62UF16803A Series 512Kx16bit full CMOS SRAM Preliminary DESCRIPTION FEATURES The HY62UF16803A is a high speed, super low power and 8Mbit full CMOS SRAM organized as 524,288 words by 16bits. The HY62UF16803A uses high performance full CMOS process technology and is designed for high speed and

Contextual Info: LAN91C96I PRELIMINARY ISA Single-Chip Full Duplex Ethernet Controller with Magic Packet FEATURES !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" !" ISA Single-Chip Ethernet Controller Fully Supports Full Duplex Switched Ethernet

Contextual Info: HY62QF16803A 512Kx16bit full CMOS SRAM Preliminary DESCRIPTION FEATURES The HY62QF16803A is a high speed, super low power and 8Mbit full CMOS SRAM organized as 524,288 words by 16bits. The HY62QF16803A uses high performance full CMOS process technology and is designed for high speed and

HY62UF16101LLM

Contextual Info: HY62UF16101 Series 64Kx16bit full CMOS SRAM DESCRIPTION FEATURES The HY62UF16101 is a high speed, low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62UF16101 uses high performance full CMOS process technology and designed for high speed low power circuit