FPSLIC APPLICATION NOTE Search Results

ICCA90

Abstract: lnkat94k-32s atmel Cross Reference Search
Contextual Info: Getting Started with the IAR Embedded Workbench for FPSLIC Introduction The purpose of this application note is to guide new users through the design and development of C/Assembly code for FPSLIC when using an IAR Embedded Workbench IAREW . This application note provides information on all the settings in

2824B

Abstract: AT94K AT94K40AL AT94S
Contextual Info: Accessing the Dual-port SRAM Block from the FPGA Side of the FPSLIC 1. Introduction This application note provides designers with an understanding of how to access and achieve optimal performance from the Shared Dual-port SRAM block from the FPGA side of the FPSLIC.

design ideas

Abstract: atmel application note
Contextual Info: Write us an FPSLIC
application note and we will give you 6 months software…FREE! Credit where credit is due right! So here’s the deal…. We at Atmel think that once you start using our FPSLIC starter kit that you’ll come up with lots of neat ideas on how to use the board and the

STK594

Abstract: D0802
Contextual Info: E nglis h | C hines e | J apanes e Enter Keywords A dvanced Search Products | Corporate | Investors | Quality | Press Room | Contact Us | Careers Products > > FPSLIC AVR with FPGA > Tool Card ATSTK594 Home Overview Devices Tools & Software Datasheets Application Notes

AT40K

Abstract: AT94K
Contextual Info: Register and Bit Name Definitions for the FPSLIC Family Introduction This application note contains files that allow the user to use Register and Bit names from the data book when writing assembly programs. To use the files, simply include them in the top of the

Contextual Info: Mixing C and Assembly Code with IAR Embedded Workbench for FPSLIC™ Features Introduction • Passing Variables between C and This application note describes how to use C to control the program flow and main program and assembly modules to control time-critical I/O functions.

AT94K

Abstract: ATSTK94 CS10 CS11 CS12
Contextual Info: Sleep Modes and Achieving Low-power Supply Current on AT94 Series FPSLIC Devices Introduction The purpose of this application note is to provide designers with an understanding of the 3 available Sleep Modes and how to achieve low-power supply current on AT94

"cyclic redundancy check" data transmission

Abstract: AT17 AT94K ATMEL PROTOCOL
Contextual Info: Theory of XY-modem Protocol This application note describes the theory of XY-modem protocol used for the “UART and 2-wire Interface Reconfiguration of the AT94K FPSLIC using an AT17 Series E E P RO M ” a ppl ic a ti on n ot e, ava il able on t he A t m el we b s it e, at

2-bit comparator

Abstract: DC MOTOR SPEED CONTROL USING VHDL quadrature decoder digital clock using logic gates counting second DC motor fpga PWM fpga vhdl AT40K05AL compare encoder QUADRATURE CLOCK CONVERTER AT40K
Contextual Info: Motor Control using FPSLIC /FPGA This application note describes the implementation of Pulse Width Modulation PWM and Quadrature Decoder/Counter modules for motor control and motor sensor applications. The on-chip FPGA (up to 40K gates) can be used to implement multiple programmable PWM and Quadrature Decoder modules, allowing designers to implement multiple

AT40K

Abstract: AT94K
Contextual Info: Getting Started with ImageCraft C for the FPSLIC™ Family Features • How to Open a New Project • Description of Option Settings • Writing and Compiling the C Code Introduction The purpose of this application note is to guide new users through the initial settings of the ImageCraft IDE and compile

AT94K

Abstract: AT94S
Contextual Info: Setup and Use of the LPM Instruction Features • Use of the LPM Load Program Memory Instruction with the AVR Assembler • Load Constants from Program Memory • Use of Look-up Tables Introduction This application note describes how to access the constants saved in the Flash program memory of the microcontroller embedded in FPSLIC devices. The AVR

AT94K

Contextual Info: 16-bit Arithmetic Features • Easily Expandable to 32-bits or Any Word Length • Code Density and Speed Matches 16-bit Controllers • Runable Example Program Introduction This application note lists program examples for arithmetic operation on 16-bit values.

MPY16U

Abstract: 8 bit multiplier with shift register mpy16s MPY16 m16u2 MC8U
Contextual Info: Multiply and Divide Routines Features Introduction • • • • • This application note lists subroutines for multiplication and division of 8- and 16bit signed and unsigned numbers. A listing of all implementations with key performance specifications is given in

AT94K

Abstract: AT94S stepper motor with step angle 1.8 stepper motor
Contextual Info: Stepper Motor Controller Features • • • • • High-Speed Stepper Motor Controller Interrupt Driven Compact Code Only 10 Bytes Interrupt Routine Very High Speed Low Computing Requirement Introduction This application note describes how to implement a compact-size and high-speed

AT24CXXX

Abstract: AT94K05 AT94K10 AT94K40 ATDH2200E ATDH2225 ATFS05 ATFS10 ATFS40
Contextual Info: Features • Designed to Store Configurator Programs for Field Programmable System Level • • • • • • • • Integrated Circuits FPSLICs In-System Programmable (ISP) via 2-wire Bus Spare Memory Available for System Parameters Storage Low-power CMOS EEPROM Process

4 MHz crystal

Abstract: uart.c AT94K
Contextual Info: Using the FPSLIC UARTs in C Features Interrupt Controlled UARTs • Setup and Use of the FPSLIC UARTs • Code Examples for Polled and Interrupt The UARTn generates an interrupt when the UARTn has finished transmitting or receiving a byte. The interrupt handling

scr25

Abstract: SCR PIN CONFIGURATION scr16 SCR30 AT94K AT94K05 AT94K10 AT94K40 atmel AT94K manual 12CCLK
Contextual Info: AT94K Series Configuration Configuration is the pr ocess by which a design is loaded into an AT94K Field Programmable System Level Integrated Circuit FPSLIC device. AT94K Series devices are SRAM based and can be configured any number of times. The entire

AT40K

Abstract: AT94K AT94S ATSTK94 Figaro application note
Contextual Info: FPSLIC on-chip Partial Reconfiguration of the Embedded AT40K FPGA Features • Demonstrates Usage of Built-in FPGA Cache Logic Interface • Implementation Targeted for FPSLIC Starter Kit • Full FPGA and AVR® Source Code Included Description This example demonstrates the reconfiguration process of the FPGA using the built-in

power supply diagram

Abstract: AT94K AT94S PC84 PQ208 TQ144 VQ100 Designing in Split Power Supply Support for AT94KAL and AT94SAL atmel 144
Contextual Info: Designing in Split Power Supply Support for AT94KAL/AX and AT94SAL/AX Devices Features Introduction Programmable SLI AT94K/AT94S Series The AT94K Field Programmable System Level Integrated Circuit FPSLIC and the AT94S Secure FPSLIC exists in two different power families, the AL and AX. The AL

tqfp144 footprint

Abstract: atmel 144 ATDH40M
Contextual Info: Revision ATDH40M to work with both AT94K/AT40K For customers with existing systems You can modify the existing ATDH40M Prototype system to work with FPSLIC AT94K and the existing AT40K device. The ATDH40M motherboard interfaces with various daughter boards in order to program different AT94K FPSLIC/AT40K FPGA

LT1117-18

Abstract: LT1117-1.8 vhdl code for rs232 receiver using fpga interface of rs232 to UART in VHDL Figaro application note dongle diagram flow design sw-dpdt FIGARO stk500 AVR atmel 128 kit schematic
Contextual Info: STK594 . User Guide Table of Contents Section 1 Introduction . 1-1 1.1 Features .1-2

atmel AT94K manual

Contextual Info: Features • Hardware – ATSTK94 Onboard Features Programmable Switches, LEDs, and Alphanumeric Displays Two RS-232 Compatible Serial Ports Multiple Clocks 4 MHz, 18.432 MHz, 32.768 kHz, and Manual Two-wire Serial Interface for Communication Easy Access to all FPSLIC Pins via Headers

AT40K

Abstract: AT94K ubrof
Contextual Info: Getting Started with C for the FPSLIC Family Using the IAR Compiler Features • • • • • How to Open a New Project Description of Option Settings Linker Command File Examples Writing and Compiling the C Code How to Load the Debug and Executable

3017b

Contextual Info: Features • Designed to Store Configurator Programs for Field Programmable System Level Integrated Circuits FPSLICs In-System Programmable (ISP) via 2-wire Bus Cascadable Read Back to Support Additional Configurations or Higher-density Arrays Low-power CMOS EEPROM Process