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    FPI BUS Search Results

    FPI BUS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54F646/Q3A
    		Rochester Electronics LLC 54F646 - BUS TRANSCEIVER/REGISTER PDF Buy
    29C863ADM/B
    		Rochester Electronics LLC AM29C863A -High Performance CMOS Bus Transceiver PDF Buy
    54F648/BLA
    		Rochester Electronics LLC 54F648 - Bus Transceiver/Register Inverted - Dual marked (5962-8975402LA) PDF Buy
    54ACTQ245DM/B
    		Rochester Electronics LLC 54ACTQ245 - Bus Driver/Transceiver, 1-Func, 8-Bit, True Output, CMOS PDF Buy
    54FCT244DM/B
    		Rochester Electronics LLC 54FCT244 - Bus Driver, 2-Func, 4-Bit, True Output, CMOS PDF Buy

    FPI BUS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    HN58C65PJ-25

    Contextual Info: ADE-203-411A Z HN58C65PJ/FPI 8,192-word x 8-bit Electrically Erasable and Programmable CMOS ROM Rev. 1.0 June 20, 1995 HITACHI The Hitachi HN58C65 is an electrically erasable and programmable ROM organized as 8,192-word x 8 -b it. It r e a liz e s h ig h s p e e d , lo w p o w e r


    OCR Scan     		ADE-203-411A HN58C65PJ/FPI 192-word HN58C65 32-byte HN58C65PJ-25 28-pin DP-28) PDF

    fpi bus

    Contextual Info: Data Transfer between external and internal memory SP SRAM This CarmelNote is useful for system designers to make decision regarding the trade-off and the relation between external and internal memory. We will not discuss any cache-concepts or the detailed connection of external


    Original     		PDF

    PA2032

    Abstract: fpi bus TRMD-030-L LED DIP2 82C54 LED10 PC16550 J10132 0x000030 ISA connector
    Contextual Info: 2000-01-25 @ 14:54 CAREB Users Manual CARMEL Test and Evaluation Board V0.90 1999-12 Confidential Infineon Technologies Table of Contents Table of Contents Page 1 1.1 1.1.1 1.2 1.2.1 1.2.2 1.2.3 1.3 1.3.1 1.3.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


    Original     		PDF

    LQFP256

    Abstract: ZL50017 ZL50017GAC ZL50017GAG2 ZL50017QCC
    Contextual Info: ZL50017 1 K Digital Switch Data Sheet Features • November 2006 1024 channel x 1024 channel non-blocking digital Time Division Multiplex TDM switch at 4.096, 8.192 or 16.384 Mbps Ordering Information ZL50017GAC ZL50017QCC ZL50017QCG1 256 Ball PBGA 256 Lead LQFP


    Original     		ZL50017 ZL50017GAC ZL50017QCC ZL50017QCG1 ZL50017GAG2 LQFP256 ZL50017 ZL50017GAC ZL50017GAG2 ZL50017QCC PDF

    fpi bus

    Abstract: tricore instruction set infineon tricore Tricore single bus master CPU DSP "saturation arithmetic" TA 8777
    Contextual Info: MP System Licensing Program TriCore is an innovative, award-winning architectural solution unifying the best features of real-time microcontrollers, computational power of DSP and the price / performance benefits of a superscalar RISC. MCU Highlights TriCore’s modular system architecture facilitates the design of true system-on-chip


    Original     		D-81541 fpi bus tricore instruction set infineon tricore Tricore single bus master CPU DSP "saturation arithmetic" TA 8777 PDF

    Ps3 MOTHERBOARD CIRCUIT diagram

    Abstract: W25 smd LL42 TC11IB EL B17 C007
    Contextual Info: Da ta S he et , V 1. 3, S ep . 2 00 2 TC11IB 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2002-09 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 2002.


    Original     		TC11IB 32-Bit D-81541 P-BGA-388-2 Ps3 MOTHERBOARD CIRCUIT diagram W25 smd LL42 TC11IB EL B17 C007 PDF

    29BL162

    Abstract: fpi bus D400 E800 J1850 TC1920 tricore adc
    Contextual Info: P r o d u c t O v e r v ie w , V 1 . 0 , N o v . 2 0 0 1 TC1920 D ra ft 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2001-11 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany


    Original     		TC1920 32-Bit D-81541 29BL162 fpi bus D400 E800 J1850 TC1920 tricore adc PDF

    siemens S 7- 400 MANUAL

    Abstract: "64-Bit Microcontroller" tricore pcp instruction set tricore PCXI tricore instruction set "vector instructions" saturation TriCore Architecture Manual
    Contextual Info: s TriCore Architecture Overview Handbook Elaine Hadad Version 1.1 09/17/97 ♦ P RELIM INARY EDIT IO N ♦ Copyright 1997 Siemens AG. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for


    Original     		M32T008 97/08-054E-2500 B158-H7127-X-X-7600 siemens S 7- 400 MANUAL "64-Bit Microcontroller" tricore pcp instruction set tricore PCXI tricore instruction set "vector instructions" saturation TriCore Architecture Manual PDF

    E1210

    Abstract: JT-G704 JT-G703 JT-G706 MT9072 MT9072AB MT9072AV PUB43801 PCM24 Y230
    Contextual Info: MT9072 Octal T1/E1/J1 Framer Data Sheet Features • • • • • • • October 2004 Eight fully independent, T1/E1/J1 framers 3.3 V supply with 5 V tolerant inputs Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling Framing Modes:


    Original     		MT9072 IEEE-1149 MT9072AB MT9072AV MT9072 E1210 JT-G704 JT-G703 JT-G706 MT9072AB MT9072AV PUB43801 PCM24 Y230 PDF

    ZL50020

    Abstract: ZL50020GAC ZL50020QCC ZL50020QCG1
    Contextual Info: ZL50020 Enhanced 2 K Digital Switch Data Sheet Features • November 2006 2048 channel x 2048 channel non-blocking digital Time Division Multiplex TDM switch at 8.192 Mbps and 16.384 Mbps or using a combination of ports running at 2.048, 4.096, 8.192 and 16.384 Mbps


    Original     		ZL50020 ZL50020GAC ZL50020QCC ZL50020QCG1 ZL50020GAG2 ZL50020 ZL50020GAC ZL50020QCC ZL50020QCG1 PDF

    fpi bus

    Abstract: cerberus J1850 SAK-TC1775-L40E TC1775 Tricore* ocds sak-tc1775 h jtag
    Contextual Info: Product Brief TC1775 H i g h l y I n t e g r a t e d 3 2 - B i t T r i C o r e TM- b a s e d Microcontroller for Automotive Applications The TC1775 Advanced 32-bit TriCore TM -based microcontroller winner of the prestigious EDN Innovation Award in the year 2001 - is


    Original     		TC1775 32-bit B158-H8526-X-X-7600 fpi bus cerberus J1850 SAK-TC1775-L40E TC1775 Tricore* ocds sak-tc1775 h jtag PDF

    GR-1244-CORE

    Abstract: ZL50022 ZL50022GAC ZL50022QCC ZL50022QCG1
    Contextual Info: ZL50022 Enhanced 4 K Digital Switch with Stratum 4E DPLL Data Sheet Features • November 2006 4096 channel x 4096 channel non-blocking digital Time Division Multiplex TDM switch at 8.192 Mbps and 16.384 Mbps or using a combination of ports running at 2.048, 4.096,


    Original     		ZL50022 ZL50022GAC ZL50022QCC ZL50022QCG1 ZL50022GAG2 GR-1244-CORE ZL50022 ZL50022GAC ZL50022QCC ZL50022QCG1 PDF

    A114

    Abstract: QFP-44 QFP-64 VRS51L3074 VRS51L3174 i2c interfacing with 8051 asm code pc1162 131BC 8051 interfacing to EEProm
    Contextual Info: VRS51L3074 Rev 1.5 Datasheet High-Performance 8051 MCU + 8KB FRAM Overview Feature Set The VRS51L3074 is a high performance, 8051-based microcontroller coupled with a fully integrated array of peripherals for addressing a broad range of embedded design applications.


    Original     		VRS51L3074 VRS51L3074 8051-based 40-MIPS, A114 QFP-44 QFP-64 VRS51L3174 i2c interfacing with 8051 asm code pc1162 131BC 8051 interfacing to EEProm PDF

    CARMEL

    Abstract: viterbi algorithm
    Contextual Info: CARMEL DSP Product Overview Applications ● Next Generation Wireless – Handsets and Base Stations – Modems for WANs and LANs ● Telecom and Broadband Communications – Voice-over-Internet-Protocol VoIP – Cable modems – xDSL ● Multimedia and Consumer Electronics


    Original     		16-bit, CARMEL viterbi algorithm PDF

    marking AUEN

    Abstract: ADD32
    Contextual Info: Pre-Production VRS51L2070 High-Performance 8051 MCU Overview Feature Set o o The VRS51L2070 constitute a family of high performance, 8051based microcontrollers coupled with a fully integrated array of peripherals for addressing a broad range of embedded design


    Original     		VRS51L2070 VRS51L2070 8051based 40-MIPS, marking AUEN ADD32 PDF

    VRS51L3174

    Abstract: i2c interfacing with 8051 asm code A114 QFP-44 pulse width measure counter delay clock VRS51 INTEN17
    Contextual Info: VRS51L3174 Rev 1.0 Datasheet High-Performance 8051 MCU + 8KB FRAM Overview Feature Set The VRS51L3174 is a high performance, 8051-based microcontroller coupled with a fully integrated array of peripherals for addressing a broad range of embedded design applications.


    Original     		VRS51L3174 VRS51L3174 8051-based 40-MIPS, i2c interfacing with 8051 asm code A114 QFP-44 pulse width measure counter delay clock VRS51 INTEN17 PDF

    qpf 64

    Abstract: 8051s 8051 microcontroller pin configuration with keypad aucon VRS51L2070 pwm4en p07ad 8051 interfacing lcd keypad 8051s jtag QFP-64
    Contextual Info: VRS51L2070 Rev 1.2 Preliminary Datasheet High-Performance Versa 8051 MCU Overview Feature Set The VRS51L2070 is a high performance, 8051-based microcontroller coupled with a fully integrated array of peripherals for addressing a broad range of embedded design applications.


    Original     		VRS51L2070 VRS51L2070 8051-based 40-MIPS, qpf 64 8051s 8051 microcontroller pin configuration with keypad aucon pwm4en p07ad 8051 interfacing lcd keypad 8051s jtag QFP-64 PDF

    Tricore

    Abstract: J1850
    Contextual Info: PRODUCT BRIEF TC 1775 A d v a n c e d 3 2 - b i t Tr i C o re - b a s e d Microcontroller for Automotive Embedded Control Applications The AUDO™ architecture is driven by the demanding requirements of powertrain systems. This architecture is easily applicable to other embedded


    Original     		B191-H7737-G1-X-7600 Tricore J1850 PDF

    p06a

    Abstract: P12C MLF68 VRS51
    Contextual Info: Pre-Production VRS51L30xx High-Performance 8051 MCU + F-RAM Overview Feature Set o o The VRS51L30xx constitute a family of high performance, 8051based microcontrollers coupled with a fully integrated array of peripherals for addressing a broad range of embedded design


    Original     		VRS51L30xx VRS51L30xx 8051based 40-MIPS, VRS51L3072 VRS51L3074 p06a P12C MLF68 VRS51 PDF

    transistor smd marking ka p7

    Abstract: diode datasheet IN47 ic SMD MARKING CODE ad 5.9 IN60 diode smd p9 10-10 J1850 P813 SAK-TC1775-L40E TC1775 IN58 KE
    Contextual Info: D at a S h e e t , V 1. 2 , M ay 2 00 2 TC1775 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2002-05 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany Infineon Technologies AG 2002.


    Original     		TC1775 32-Bit D-81541 transistor smd marking ka p7 diode datasheet IN47 ic SMD MARKING CODE ad 5.9 IN60 diode smd p9 10-10 J1850 P813 SAK-TC1775-L40E TC1775 IN58 KE PDF

    SAK-TC1765N-L40EB

    Abstract: SAK-TC1765T-L40EB TC1765 TC1765N TC1765T Infineon Technologies dda0 b0505-2 Q67121-C2348
    Contextual Info: Da ta She et, V1 .2, De c. 2 00 2 TC1765 32-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2002-12 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany Infineon Technologies AG 2002.


    Original     		TC1765 32-Bit MCT05234 0000H) P-LBGA-260-2 GPA09421 SAK-TC1765N-L40EB SAK-TC1765T-L40EB TC1765 TC1765N TC1765T Infineon Technologies dda0 b0505-2 Q67121-C2348 PDF

    EASY3456-T3

    Abstract: TR54016 PBGA-388
    Contextual Info: P R O D U C T B R I E F Channelized T3 Termination with DS3 Framer, M13 Multiplexer, T1/E1 Framers and 256 Channel HDLC/PPP Controller The TE3-CHATT is a serial communication controller which multiplexes up to 256 channels into a channelized DS3 trunk. The unique integration of T1/E1 framer, M13


    Original     		B119-H7610-G1-X-7600 EASY3456-T3 TR54016 PBGA-388 PDF

    TR54016

    Abstract: EASY256 "network interface controller"
    Contextual Info: P R O D U C T B R I E F Multichannel Network Interface Controller for HDLC/PPP with 256 Channels, Integrated T1/E1 Framer, M13 Multiplexer and DS3 Framer The MUNICH256FM is a serial communication controller which multiplexes up to 256 channels into a channelized DS3 trunk.


    Original     		MUNICH256FM B119-H7610-X-X-7600 TR54016 EASY256 "network interface controller" PDF

    EASY256

    Abstract: MUNICH256 E1 frame PEB 22554 v2 2 fpi bus "network interface controller"
    Contextual Info: P R O D U C T B R I E F 3.3 V Multichannel Network Interface Controller for HDLC/PPP with 256 Channels and On-Chip Data Management Unit The MUNICH256 is a highly integrated protocol controller which implements HDLC, PPP and transparent TMA protocol processing with support for up to 256 bi-directional channels each of


    Original     		MUNICH256 B119-H7758-X-X-7600 EASY256 E1 frame PEB 22554 v2 2 fpi bus "network interface controller" PDF