FLAG13 Search Results

ADSP-21160

Abstract: ADSP-21161 ADSP-21364 CP-1201 ADSP-21364SBSQZENG tbdm
Contextual Info: a SHARC Processor ADSP-21364 Preliminary Technical Data SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21364 is available with a 333 MHz core instruction

ADSP-21362KBC

Abstract: L05 SMD 4604 inverter A08 smd transistor bottle counter IEEE format transistor SMD n03 ADSP-21160 ADSP-21161 ADSP-21362 CP-1201
Contextual Info: a SHARC Processor ADSP-21362 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance automotive audio processing Single-instruction, multiple-data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM

ADSP-21266

Abstract: ADSP-21160 ADSP-21161 ADSP21266
Contextual Info: SHARC Embedded Processor ADSP-21266 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs The ADSP-21266 processes high performance audio while

ADSP-21160

Abstract: ADSP-21161 ADSP21261 ADSP-21261
Contextual Info: SHARC Embedded Processor ADSP-21261 a SUMMARY KEY FEATURES High performance 32-bit/40-bit floating-point processor Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Single-instruction multiple-data SIMD computational architecture—two 32-bit IEEE floating-point/32-bit fixed-point/

Contextual Info: a SHARC Processor ADSP-21362 Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance automotive audio processing Single-Instruction Multiple-Data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM

Contextual Info: a SHARC Processor ADSP-21365/ADSP-21366 Preliminary Technical Data SUMMARY Single-Instruction Multiple-Data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family

AD150

Contextual Info: a SHARC Processor ADSP-21364 Preliminary Technical Data SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21364 is available with a 333 MHz core instruction

sharc ADSP-21xxx general block diagram

Abstract: block diagram of ADSP21xxx SHARC processor sharc 21xxx architecture block diagram 4x4 barrel shifter sharc ADSP-21xxx architecture diagram sharc ADSP21xxx architecture ADSP-21160 ADSP-21161 ADSP-21266 JC JB jt
Contextual Info: PRELIMINARY TECHNICAL DATA S a High Performance SHARC Audio Processor ADSP-21266 Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating point processor optimized for audio processing The ADSP-21266 processes high performance audio while enabling low system costs

spi flash parallel port

Abstract: ADSP-21160 ADSP-21161 ADSP-21262 ADSP-21266 A2388
Contextual Info: SHARC Embedded Processor ADSP-21262 a SUMMARY KEY FEATURES High performance 32-bit/40-bit floating-point processor Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Single-instruction multiple-data SIMD computational architecture—two 32-bit IEEE floating-point/32-bit fixed-point/

B41301

Abstract: B2110A "Bipolar Integrated Technology" 51 ti jbr I321 B211 B2130 B3130 B4130 TI31
Contextual Info: Bipolar Integrated Technology, Inc. B2130/B3130/B41301 Advance Information Single Chip Floating Point Processors Description Features Single chip solution for support of ANSI/IEEE STD. 754 single and double precision, and DEC F&G formats 10 ns (worst case) Pipeline mode for maximum throughput

seven segment multiplex alphabetic

Abstract: tss721 D4101 tss721 master TSS400CFN-S2 K-Line L line meter-bus SLMS A516 DL10
Contextual Info: TSS400-S2 µPOWER PROGRAMMABLE HIGH-PRECISION SENSOR SIGNAL PROCESSOR SLMS002 – D4101, OCTOBER 1993 • • • • • • 12-Bit ADC With 4 Multiplexed Inputs Wide Supply Voltage Range 2.6 V to 5.5 V Low Power Consumption at VDD = 3 V – 0.1 µA in Off Mode Typ

dts master audio DL 1200

Abstract: 3x3 bit parallel multiplier 4604 CMOS Dolby prologic ADSP21365 ADSP-21365 CP-1201
Contextual Info: a SHARC Processor ADSP-21365/ADSP-21366 Preliminary Technical Data SUMMARY Single-Instruction Multiple-Data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family

Contextual Info: SHARC Processor ADSP-21267 Preliminary Technical Data SUMMARY DAI incorporates two Precision Clock Generators PCG , and an Input Data Port (IDP) that includes a Parallel Data Acquisition Port (PDAP), and three programmable timers, all under software control by the Signal Routing Unit (SRU)

ADSP21267

Abstract: ADSP-21267
Contextual Info: SHARC Processor ADSP-21267 Preliminary Technical Data SUMMARY DAI incorporates two precision clock generators PCG , and an input data port (IDP) that includes a parallel data acquisition port (PDAP), and three programmable timers, all under software control by the signal routing unit (SRU)

L05 SMD

Abstract: CRYSTAL smd trw ADSP-21161 reference manual bc136 A07 smd A08 smd transistor analog devices m01 n10 smd 6-pin spi flash parallel port transistor SMD n03
Contextual Info: SHARC Embedded Processor ADSP-21266 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Processes high performance audio while enabling low

AD1835A

Abstract: ADSP-21364 LED10 SW11 AD8606ARZ
Contextual Info: ADSP-21364 EZ-KIT Lite Evaluation System Manual Revision 3.2, July 2007 Part Number 82-000840-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2007 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent

rca cmos book

Abstract: ATMEL SOT23-6 YEAR DATE CODE NEC c157 ADSP-21262 LED10 SW11 dac for audio mcs 96 manual evaluation board Rev. 3.1
Contextual Info: ADSP-21262 EZ-KIT Lite Evaluation System Manual Revision 3.0, August 2006 Part Number 82-000800-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent

8000-0x000A

Abstract: BC136
Contextual Info: SHARC Embedded Processor ADSP-21261/ADSP-21262/ADSP-21266 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs

Sony ImX 238

Abstract: Sony imx 214 sony IMX 132 sony IMX 145 sony IMX 138 Sony IMX 145 CMOS Sony sony IMX 135 Sony Imx 224 sony ifs 190 transmitter
Contextual Info: ADSP-2136x SHARC Processor Hardware Reference Includes ADSP-21362, ADSP-21363, ADSP-21364, ADSP-21365, ADSP-21366 Revision 2.0, June 2009 Part Number 82-000501-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2008 Analog Devices, Inc., ALL RIGHTS RESERVED. This

sony IMX 132 CMOS

Abstract: Sony ImX 238 mp3 player schematic diagram sony IMX 136 sony IMX 132 GENERATOR avr diagram Sony imx 214 sony IMX 135 sony IMX 145 McEx
Contextual Info: ADSP-2137x SHARC Processor Hardware Reference Includes ADSP-21367, ADSP-21368, ADSP-21369, ADSP-21371, ADSP-21375 Revision 2.0, April 2010 Part Number 82-000100-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information

aac ENcoder

Abstract: uPD77015 uPD77016 uPD77110 uPD77113A uPD77114 uPD77115 uPD77210 uPD77213 WB77016
Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

ADSP-21160

Abstract: ADSP-21161 ADSP-21364 hardware design for DC MOTOR SPEED CONTROL USING
Contextual Info: SHARC Processor ADSP-21364 Preliminary Technical Data SUMMARY Code compatible with all other members of the SHARC family The ADSP-21364 is available in a 300 MHz core instruction rate. For complete ordering information, see Ordering Guide on page 43 High performance 32-bit/40-bit floating point processor

ADSP21261

Abstract: pakages 130 pakages ADSP-21160 ADSP-21161 ADSP-21261 ADSP-21266
Contextual Info: SHARC Processor ADSP-21261 Preliminary Technical Data SUMMARY High bandwidth I/O— A parallel port, SPI port, four serial ports, digital audio interface DAI , and JTAG DAI incorporates two precision clock generators (PCGs), an input data port (IDP) which includes the parallel data

ADSP-21362

Abstract: ADSP-21363 ADSP-21364 ADSP-21365 CP-1201 SD4a AD150
Contextual Info: a SHARC Processor SUMMARY The ADSP-2136x processors are available with a 333 MHz core instruction rate and unique peripherals such as the digital audio interface, S/PDIF transceiver, DTCP digital transmission content protection protocol , serial ports,