FCT162511CT Search Results

Contextual Info: Integrated D evice Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage <1 ixA (max)

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: • • • • The FCT162511T 16-bit registered/latched transceiver with parity is built

SO56-2

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: − − − − The FCT162511T 16-bit registered/latched transceiver with parity is

Contextual Info: Integrated Device Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT type latches and D-type flip-flops to allow data flow in transpar­ ent, latched or clocked modes. The device has a parity

Contextual Info: Integrated Device Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • 0 .5 M IC R O N C M O S T e c h n o lo g y T yp ica l tsk o (O u tput S kew ) < 2 5 0 p s , clo cke d m o de L o w in p u t an d o u tp u t leaka ge <1 (iA (m ax)

74fct162511 idt

Contextual Info: FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • IDT54/74FCT162511 AT/CT PRELIMINARY type latches and D-type flip-flops to allow dataflow in transpar­ ent, latched or clocked modes. The device has a parity

SO56-2

Abstract: phase cheker
Contextual Info: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage ≤1µA (max)

phase cheker

Abstract: B1A16 SO56-2
Contextual Info: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT PRELIMINARY FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode

Contextual Info: Integrated Device Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • 0.5 MICRON CM O S Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage <1 jxA (max) ESD > 2000V per M IL-STD-883, Method 3015;

Contextual Info: FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY r?y integrated Devi ce Technology, Inc. FEATURES: • • • • IDT54/74FCT162511AT/CT PRELIMINARY ty p e latch es and D -typ e flip -flo p s to a llo w d a ta flo w in tra n s p a r­ ent, latch ed o r clo c k e d m o des. T h e d e v ic e h a s a p a rity

SO56-2

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY DESCRIPTION: FEATURES: − − − − 0.5 MICRON CMOS Technology

SO56-2

Abstract: phase cheker
Contextual Info: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage ≤1µA (max)

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: • • • • The FCT162511T 16-bit registered/latched transceiver with parity is built

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY DESCRIPTION: FEATURES: • • • • • • • • •

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: • • • • The FCT162511T 16-bit registered/latched transceiver with parity is built

SO56-2

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: − − − − The FCT162511T 16-bit registered/latched transceiver with parity is

phase cheker

Abstract: psc2101
Contextual Info: H htegiated D e v iz e T e c h n o lo g y , l i e . FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • 0.5 MICRON CM O S Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage <1 jxA (max)

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: • • • • The FCT162511T 16-bit registered/latched transceiver with parity is built

Contextual Info: IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: • • • • The FCT162511T 16-bit registered/latched transceiver with parity is built

phase cheker

Abstract: SO56-2 fct162511ct B1A16
Contextual Info: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT PRELIMINARY FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode