ERC EQUIVALENT Search Results

omron C60k cables pin diagram

Abstract: C200H-LK201-v1 OMRON Operation Manual Omron Sysmac C200HG OMRON sysmac c20 programming manual 3G2A6-LK202-EV1 omron sysmac c20 ERC 24-06 diode
Contextual Info: Cat. No. W174-E1-07 SYSMAC C-Series SYSMAC LINK SYSTEM MANUAL C-series SYSMAC LINK System Manual Revised September 2003 SLK11 SLK21-V1 RUN ERC P/S ERH RUN ERC ERH INS M/S INS M/S SD RD SD RD TS LNK TS LNK SLK24 SLK14 RUN ERC INS SD P/S ERH M/S RD TS LNK RUN

N558

Abstract: hp 7540 hp dv5 schematic diagram free 4011 fan-out U807 D DATA SHEET IC 4011 hp 7540 monitor u807 u1621 u806
Contextual Info: Verilog Design Kit User's Manual July 1998 Version 1.00 Holtek Microelectronics Inc. TABLE OF CONTENT Chapter 1. Introduction Chapter 2. Installation Chapter 3. Before you start Chapter 4. fv2edif – Verilog to EDIF Netlist Translator Chapter 5. fdec – ERC / CDC Multi-functions

226 varactor

Abstract: Ceramic Resonator GHz PLL 2400 MHZ
Contextual Info: CHT3250a PLL Oriented Component For 5.8GHz Sources GaAs Monolithic Microwave IC Description Vtune Main Features Vd OUT x4 ERC FO F0/4 AUX (F0/4) External resonator Block diagram 6,3 6,2 Frequency (GHz) The CHT3250a is a MMIC multifunction integrating an oscillator at 1.45GHz, a

PM 3226

Abstract: DS1387 DS1367
Contextual Info: DS1385/DS1387 DALLAS SEMICONDUCTOR DS1385/DS1387 RAMified Real Time Clock 4K x 8 PIN ASSIGNMENT FEATURES • Upgraded IBM AT computer clock/calendar with 4K x 8 extended RAM Ô ERC • Totally nonvolatile with over 10 years of operation in the absence of power

Contextual Info: rfHCS362G/362F KEELOQ Code Hopping Encoder with UHF ASK/FSK Transmitter General Pin Diagrams KEELOQ® SOIC UHF ASK/FSK Transmitter • Conforms to US FCC Part 15.231 regulations and European ERC 70-03E and EN 300 220-1 requirements • VCO phase locked to quartz crystal reference;

Si948

Abstract: 2n6251 si9482 IC 350B
Contextual Info: File N um ber 523 2N6249, 2N6250, 2N6251 450-V, 30-A, 175-W Silicon N-P-N Switching Transistors For S w itchin g A p p licatio n s in Industrial and C o m m erc ial E q uip m en t Features: • H ig h volta ge ra tin g s : Vceo = 450 V 2N6251 . 375 V (2N 6250)

Contextual Info: SN74GTLPH1645 16-BIT LVTTL-TO-GTL+ ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES290 – OCTOBER 1999 D D D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Bidirectional Interface Between GTL+ Signal Levels and LVTTL Logic Levels Equivalent to ’16245 Function

Contextual Info: SN74GTLPH3245 32-BIT LVTTL-TO-GTL+ ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES291 – OCTOBER 1999 D D D D D D Bidirectional Interface Between GTL+ Signal Levels and LVTTL Logic Levels Equivalent to ’32245 Function LVTTL Interfaces Are 5-V Tolerant High-Drive GTL+ Outputs 100 mA

axi3

Contextual Info: FAST CMOS PARITY BUS TRANSCEIVER IDT54/74FCT833A IDT54/74FCT833B Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Equivalent to AM D’s Am29833 bipolar parity bus transceiver in pinout/function, speed and output drive over full temperature and voltage supply extremes

Contextual Info: y FAST CMOS QUAD DUAL-PORT REGISTER IDT54/74FCT399 IDT54/74FCT399A IDT54/74FCT399C Integrated Devfce Technology, Inc. FEATURES: DESCRIPTION: • IDT54/74FCT399 equivalent to FAST speed The IDT54/74FCT399/A/C are high-speed quad dual-port registers. The register selects four bits of data from either of

GTLPH1655

Abstract: SCED004 GTL1655 SN74ABT25245 SN74GTLPH1655 SN74LS00 Design Seminar Signal Transmission
Contextual Info: Application Report SCBA015A - March 2001 Fast GTLP Backplanes With the GTLPH1655 Peter Forstner and Johannes Huchzermeier Standard Linear & Logic ABSTRACT This revision of the Fast GTL Backplanes With the GTL1655 application report addresses improvements, such as the improved OEC circuitry and implementation of the

A115-A

Abstract: C101 SN74GTLP817 SN74GTLP817DW SN74GTLP817DWR
Contextual Info: SN74GTLP817 GTLP-TO-LVTTL 1-TO-6 FANOUT DRIVER SCES285C – OCTOBER 1999 – REVISED FEBRUARY 2001 D D D D D D D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW OEC Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Bidirectional Interface Between GTLP

Dielectric Resonator Oscillator DRO

Abstract: dielectric resonator k-band amplifier 6980 oscillator coupled resonator amplifier ERC equivalent resonator block
Contextual Info: CHV2040 Multifunction : K-band Oscillator and Q-band Multiplier GaAs Monolithic Microwave IC Description Main Features ¦ K-band oscillator + Q-band multiplier ¦ External resonator for stabilization < 5ppm/°C in DRO configuration ¦ External resonator for phase noise

Contextual Info: SN74GTLP817 GTLP-TO-LVTTL 1-TO-6 FANOUT DRIVER SCES285D – OCTOBER 1999 – REVISED AUGUST 2001 D D D D D D D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW OEC Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Bidirectional Interface Between GTLP

JTIDS Antenna

Abstract: cept lpd d jtids antennas 731F USSR microwave sensor REP025 733 727A
Contextual Info: http://www.ero.dk/doc/html/Rep025.htm FREQUENCY BAND 960 MHz TO 105 GHz AND ASSOCIATED EUROPEAN TABLE OF FREQUENCY ALLOCATIONS AND UTILISATIONS Brussels, June 1994 revised Bonn, March 1995 FREQUENCY BAND 960 MHz TO 105 GHz AND ASSOCIATED EUROPEAN TABLE OF FREQUENCY ALLOCATIONS AND UTILISATIONS

Contextual Info: SN74GTLPH1645 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES290D – OCTOBER 1999 – REVISED SEPTEMBER 2001 D D D D D D D D D D D D DGG OR DGV PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family TI-OPC Circuitry Limits Ringing on

Contextual Info: SN74GTLPH1645 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES290C – OCTOBER 1999 – REVISED AUGUST 2001 D D D D D D D D D D DGG OR DGV PACKAGE TOP VIEW Member of Texas Instruments’ Widebus Family TI-OPC Circuitry Limits Ringing on

A115-A

Abstract: C101 SN74GTLP817 SN74GTLP817DW SN74GTLP817DWR
Contextual Info: SN74GTLP817 GTLP-TO-LVTTL 1-TO-6 FANOUT DRIVER SCES285E – OCTOBER 1999 – REVISED AUGUST 2001 D D D D D D D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW OEC Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Bidirectional Interface Between GTLP

Contextual Info: SN74GTLPH1645 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES290D – OCTOBER 1999 – REVISED SEPTEMBER 2001 D D D D D D D D D D D D DGG OR DGV PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family TI-OPC Circuitry Limits Ringing on

GTLPH1645

Abstract: MPDS006C SN74GTLPH1645 SN74GTLPH1645DGGR SN74GTLPH1645DGVR SN74GTLPH1645GQLR
Contextual Info: SN74GTLPH1645 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES290D – OCTOBER 1999 – REVISED SEPTEMBER 2001 D D D D D D D D D D D D DGG OR DGV PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family TI-OPC Circuitry Limits Ringing on

Contextual Info: SN74GTLPH1645 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER www.ti.com FEATURES • • • • • • • • • • • • Member of the Texas Instruments Widebus Family TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes OEC™ Circuitry Improves Signal Integrity and

Contextual Info: SN74GTLPH1655 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER SCES294C – OCTOBER 1999 – REVISED AUGUST 2001 D D D D D D D D D D D D D D D DGG PACKAGE TOP VIEW Member of Texas Instruments’ Widebus Family UBT Transceiver Combines D-Type

A115-A

Abstract: C101 SN74GTLPH1655 SN74GTLPH1655DGGR
Contextual Info: SN74GTLPH1655 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER SCES294A – OCTOBER 1999 – REVISED JANUARY 2001 D D D D D D D D D D D D D D D DGG PACKAGE TOP VIEW Member of Texas Instruments’ Widebus Family UBT Transceiver Combines D-Type

Contextual Info: SN74GTLP817 GTLP-TO-LVTTL 1-TO-6 FANOUT DRIVER www.ti.com FEATURES • • • • • • • • • • • • OEC Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels