EPM5016
Abstract: EPMS016
Contextual Info: EPM5016 EPLD Features □ □ □ □ □ □ □ □ General Description High-speed 20-pin DIP, J-lead, or SOIC single-LAB MAX 5000 EPLD Combinatorial speeds with tPD = 15 ns Counter frequencies up to 100 MHz Pipelined data rates up to 100 MHz 16 individually configurable macrocells
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epm501620-pin24-ma300-mil+516-bitepm5016-15epm5016-17epm5016-20epms016
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EPM5016
Abstract: rs flip-flop IC 7400 EPMS016 EPM5128 PACKAGING
Contextual Info: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ Complete fam ily of C M O S E P L D s solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals. The advanced M A X 5000 architecture combines the speed, ease of use,
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epm5016epm519220-pin100-pin+415-nsrs flip-flop ic 7400epms016epm5128 packaging
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