EPM71284 Search Results

programming manual EPLD EPS448

Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Contextual Info: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,

EPM7128

Contextual Info: EPM7128 EPLD High-Performance 128-Macrocell Device Data Sheet December 1992, ver. 1 Features Preliminary Information □ □ □ □ □ □ □ □ High-density CMOS EPLD based on second-generation Multiple Array MatriX MAX architecture 2,500 usable gates

Contextual Info: EPM 7128 E P LD □ □ □ Information □ □ Figure 21. EPM7128 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 7 and 8 in this data sheet for pin-out information. o q o q z q q q nnnnnnn nn nn nn nn nn nn nn Pin 1 I/O c I □ I/O

EPM7128

Abstract: EPM7128 EPLD EPM7128-15 altera max epm7128 EPM7128-10 EPM7128 PLCC epm71284 D4038 EPM7128-12
Contextual Info: A L TE RA CORP bôE D • OSASTE 0003244 GÜD « A L T EPM7128 E P LD Features ^ □ □ □ □ □ H igh -d en sity CM O S EP LD b a se d on secon d -gen eration M AX architecture 2,500 usable gates Com binatorial speeds with tPD = 10 ns Counter frequencies up to 100 MHz