EP1S120F1923C6 Search Results

EP1S120F1923C6 Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
EP1S120F1923C6		Altera	Programmable Logic Device	Original	PDF	1.04MB	196

EP1S120F1923C6 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
M512K Abstract: EP1S25F780C7 EP1S30F780C7 Contextual Info: Stratix February 2002, ver. 1.0 Introduction Preliminary Information Features. Data Sheet The Stratix family of programmable logic devices PLDs is based on a 1.5-V, 0.13-µm, all-layer copper SRAM process, with densities up to 114,140 logic elements (LEs) and up to 10 Mbits of RAM. Stratix devices	Original	420-MHz EP1S60 EP1S80 EP1S120F1923C6 EP1S120 EP1S120F1923C7 M512K EP1S25F780C7 EP1S30F780C7	PDF

Catalog Datasheet

Type

Document Tags

PDF

M512K

Abstract: EP1S25F780C7 EP1S30F780C7
Contextual Info: Stratix February 2002, ver. 1.0 Introduction Preliminary Information Features. Data Sheet The Stratix family of programmable logic devices PLDs is based on a 1.5-V, 0.13-µm, all-layer copper SRAM process, with densities up to 114,140 logic elements (LEs) and up to 10 Mbits of RAM. Stratix devices

Original

420-MHz EP1S60 EP1S80 EP1S120F1923C6 EP1S120 EP1S120F1923C7 M512K EP1S25F780C7 EP1S30F780C7

PDF