EMBEDDED PROGRAMMABLE INTERRUPT CONTROLLER Search Results

PF144

Abstract: QL5030 QL5030-33APF144C TQ144
Contextual Info: QL5030 QuickPCI Data Sheet • • • • • • 33 MHz/32-bit PCI Target with Embedded Programmable Logic and Dual Port SRAM 1.0 Device Highlights High Performance PCI Controller • Programmable Interrupt Generator • I2O Support with Local Processor

6109A

Abstract: 6109AS
Contextual Info: Features • • • • • Compatible with an Embedded 32-bit Microcontroller One Period Interval Timer, 16-bit Programmable Counter One Watchdog Timer, 16-bit Programmable Counter One Real-time Timer, 20-bit Free-running Counter Interrupt Generation on Event

1725E

Contextual Info: Features Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Two Peripherals per I/O Line Interrupt Generation on Event Glitch Filter Multi-driver Open Drain Option Certain Options Parameterizable on Request Number of Programmable Lines

Contextual Info: MB86936 FUJITSU 930 SERIES 32-BIT RISC EMBEDDED PROCESSOR AD V A N C E D D A T A S H E E T JU N E 1995 • Interrupt Controller with fast interrupt response time, with programmable priority FEATURES • 2 24-bittim ersw ithl6-bitcounterand8-bitprescaler, with 3 modes o f operation

Contextual Info: Advance Information PowerNPTM NPe405L Embedded Processor Data Sheet Features • IBM PowerPCTM 405 32-bit RISC processor core operating up to 266 MHz • PC-100 Synchronous DRAM SDRAM interface operating up to 133 MHz • Programmable Interrupt Controllers supports

Contextual Info: Advance Information PowerNPTM NPe405L Embedded Processor Data Sheet Features • IBM PowerPCTM 405 32-bit RISC processor core operating up to 266 MHz • PC-100 Synchronous DRAM SDRAM interface operating up to 133 MHz • Programmable Interrupt Controllers supports

TS6 v14

Abstract: IBM CoreConnect bus
Contextual Info: PowerPC 405CR Embedded Processor Data Sheet Features • IBM PowerPC 405 32-bit RISC processor core operating up to 266MHz - Memory Management Unit - 16KB instruction and 8KB data caches - Scatter-gather chaining supported - Four channels • Programmable Interrupt Controller supports

Contextual Info: Advanced Information PowerNPTM NPe405L Embedded Processor Data Sheet Features • IBM PowerPCTM 405 32-bit RISC processor core operating up to 266 MHz • PC-100 Synchronous DRAM SDRAM interface operating up to 133 MHz • Programmable Interrupt Controllers supports

BA1 K19

Abstract: BA1K19 IBM25PPC405CR-3BC200C PPC405CR PowerPC EBC 405CR PPC405 SA-12E PowerPC 405CR PPC405 IBM
Contextual Info: PowerPC 405CR Embedded Processor Data Sheet Features • IBM PowerPC 405 32-bit RISC processor core operating up to 266MHz - Memory Management Unit - 16KB instruction and 8KB data caches - Scatter-gather chaining supported - Four channels • Programmable Interrupt Controller supports

5 zone alarm system

Abstract: bcd counter rtc circuit diagram PD-2000-1
Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Two-hundred Year Calendar, Year 2000 Compliant Programmable Periodic Interrupt Alarm and Update Parallel Load

1245D

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Two-hundred Year Calendar, Year 2000 Compliant Programmable Periodic Interrupt Alarm and Update Parallel Load

Contextual Info: Features Compatible with an Embedded ARM7TDMI Processor One Period Interval Timer, 16-bit Programmable Counter One Watchdog Timer, 16-bit Programmable Counter One Real-time Timer, 20-bit Free-running Counter Interrupt Generation on Event Can be Directly Connected to the Atmel Implementation of the AMBA™ Peripheral Bus

PD2000-1

Abstract: PD-2000-1
Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Two-hundred Year Calendar, Year 2000 Compliant Programmable Periodic Interrupt Alarm and Update Parallel Load

PD2000-1

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Two-hundred Year Calendar, Year 2000 Compliant Programmable Periodic Interrupt Alarm and Update Parallel Load

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Records Hours, Minutes, Seconds and Day of the Week Programmable Periodic Interrupt Alarm and Update Parallel Load

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Records Hours, Minutes, Seconds and Day of the Week Programmable Periodic Interrupt Alarm and Update Parallel Load

Contextual Info: Features Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Two Peripherals per I/O Line Peripheral Input Drivable by Output Peripheral Loop Mode Interrupt Generation on Event Glitch Filter Fully Scan Testable (up to 98% Fault Coverage)

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Traps Debug Signals from Processor Core, Generates Debug Interrupt Functions as UART to Transfer Debug Data Programmable Baud Rate Generator Parity, Framing and Overrun Error Detection

atmel ARM processor

Contextual Info: Features • • • • • Compatible with an Embedded 32-bit Microcontroller 12-bit Key-protected Programmable Counter Provides Reset or Interrupt Signals to the System Counter May Be Stopped While the Processor is in Debug State or in Idle Mode AMBA -compliant Interface

1725D

Contextual Info: Features • • • • • • • • • • • • • Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Two Peripherals per I/O Line Interrupt Generation on Event Glitch Filter Multi-driver Open Drain Option

1365c

Abstract: RTC0 Real-time Clock 0 RTC0 - Alarm and Parallel Load CLK32768 12-hour
Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Records Hours, Minutes and Seconds Programmable Periodic Interrupt Alarm and Update Parallel Load Control of Alarm and Update Time/Calendar Data In

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Records Hours, Minutes and Seconds Programmable Periodic Interrupt Alarm and Update Parallel Load Control of Alarm and Update Time/Calendar Data In

Contextual Info: Features • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Low Power Consumption Full Asynchronous Design Records Hours, Minutes and Seconds Programmable Periodic Interrupt Alarm and Update Parallel Load Control of Alarm and Update Time/Calendar Data In

register

Contextual Info: Features Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Interrupt Generation on Event Fully Scan Testable up to 98% Fault Coverage Can be Directly Connected to the Atmel Implementation of the AMBA™ Peripheral Bus (APB) of the ARM7TDMI Microcontroller