EL32S Search Results
EL32S Price and Stock
Broadcom Limited HLMP-EL32-SUKDDLED Uni-Color Amber 592nm 2-Pin T-1 3/4 Ammo - Ammo Pack (Alt: HLMP-EL32-SUKDD) |
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HLMP-EL32-SUKDD | Ammo Pack | 24 Weeks | 12,000 |
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HLMP-EL32-SUKDD |
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HLMP-EL32-SUKDD | Cut Tape | 10 |
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HLMP-EL32-SUKDD | 2,000 |
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HLMP-EL32-SUKDD | 8,000 | 27 Weeks | 2,000 |
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HLMP-EL32-SUKDD | 7,066 |
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TE Connectivity LMA00AB22-EL32SS RELIEF STR |
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LMA00AB22-EL32S |
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LMA00AB22-EL32S |
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LMA00AB22-EL32S |
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Broadcom Limited QLMP-EL32-SUKDDStock, Ship Today |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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QLMP-EL32-SUKDD | 12,000 |
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QLMP-EL32-SUKDD | 7,929 |
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Broadcom Limited HLMP-EL32-SV000 |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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HLMP-EL32-SV000 | 7,991 |
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EL32S Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: * + SYNERGY Clockworks PRELIMINARY SY10/100EL32 2 DIVIDER SEMICONDUCTOR DESCRIPTION FEATURES 51 Ops propagation delay The SY10EL/100EL32 are integrated +2 dividers. The differential clock inputs and the V b b allow a differential, single-ended or AC-coupled interface to the device. If |
OCR Scan |
sy10/100el32sy10el/100el32el32ssy420+2 | |
SY100EL32
Abstract: SY100EL32ZC SY10EL32ZC
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OCR Scan |
syioel32sy100el32sy10el/100el32sy10el32zc+3 | |
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Contextual Info: + SYNERGY Clockworks PRELIMINARY SY10/100EL32 2 DIVIDER SEMICONDUCTOR DESCRIPTION FEATURES • 51 Ops propagation delay The SY10ELV100EL32 are integrated -*-2 dividers. The differential clock inputs and the V bb allow a differential, single-ended or AC-coupled interface to the device. If |
OCR Scan |
sy10/100el32sy10elv100el32el32ssyst350+3 | |
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Contextual Info: Clockworks *SYNERGY •9 m v in c D P R E L IM IN A R Y SY10EL32 SY100EL32 2 D IV ID E R SEMICONDUCTOR DESCRIPTION FEATURES 51Ops propagation delay 3.0GHz toggle frequency High bandwidth output transitions Internal 75K& Input puil-down resistors ESD protection of 2000V |
OCR Scan |
sy10el32sy100el3251opssy10el/100el32+3 | |
ic 440 PIN DIAGRAMContextual Info: * C lo c k w o r k s o n i\/m t= o D IV ID E R SYNER G Y SEM IC O N D UC TO R FEA TU R ES • ■ ■ ■ ■ D ESCR IPTIO N 51 Ops propagation delay 3.0GHz toggle frequency High bandwidth output transitions Internal 75Kii Input pull-down resistors ESD protection of 2000V |
OCR Scan |
sy10el32sy100el32sy10el32zcsy100el32zc+1 | |
100EL32Contextual Info: *SYNERGY C lo c k w o rk s " PRELIMINARY SY10/100EL32 2 DIVIDER SEM IC O N D U C TO R DESCRIPTION FEATURES 51 Ops p ro p a g a tio n d elay The SY 10EL/100EL32 are integrated +2 dividers. The differential clock inputs and the Vbb allow a differential, single-ended or AC-coupled interlace to the device. If |
OCR Scan |
sy10/100el3210el/100el32sy10el32zcsy100el32zc+1 |