EE81995C56 Search Results

IS93C56-3

Abstract: G895
Contextual Info: ISSI IS93C56-3_ ÏË 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM a u g u s t 1995 FEATURES OVERVIEW • State-of-the-art architecture — N o n-vo latile data storage — Low vo lta g e operation: 3.0V V cc = 2 .7 V to 6.0V — Full T T L co m p a tib le inputs and outputs

IS93C56-3

Contextual Info: ISSI ISSI IS93C56-3 IS93C56-3 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM ® AUGUST 1995 FEATURES OVERVIEW • State-of-the-art architecture — Non-volatile data storage — Low voltage operation: 3.0V Vcc = 2.7V to 6.0V — Full TTL compatible inputs and outputs

1S93C56-3

Contextual Info: ISSI 1S93C56-3 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM AUGUST 1995 FEATURES OVERVIEW • State-of-the-art architecture — N on-vo latile data storage — Low vo lta g e operation: 3.0V V cc = 2.7 V to 6.0V — Full T T L co m p a tib le inputs and outputs

Contextual Info: ISSI IS93C56-3_ 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM a u g u s t 1995 FEATURES OVERVIEW • State-of-the-art architecture — N o n-vo latile data storage — Low vo lta g e operation: 3.0V V cc = 2 .7 V to 6.0V — Full T T L co m p a tib le inputs and outputs