EDS2 Search Results

EDS2504ACTA

Abstract: EDS2504APTA EDS2508ACTA EDS2508APTA EDS2516ACTA EDS2516APTA
Contextual Info: DATA SHEET 256M bits SDRAM EDS2504ACTA, EDS2504APTA 64M words x 4 bits EDS2508ACTA, EDS2508APTA (32M words × 8 bits) EDS2516ACTA, EDS2516APTA (16M words × 16 bits) Description Pin Configurations The EDS2504AC/AP is a 256M bits SDRAM organized as 16,777,216 words × 4 bits × 4 banks. The EDS2508

EDS2532AABJ-6B

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532AABJ-6B 8M words x 32 bits Description Pin Configurations The EDS2532AABJ is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

EDS2532JEBH-75

Contextual Info: PRELIMINARY DATA SHEET 256M bits SDRAM EDS2532JEBH-75 8M words x 32 bits Description Pin Configurations The EDS2532JEBH is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the

EDS2532EEBH-9A

Contextual Info: PRELIMINARY DATA SHEET 256M bits SDRAM EDS2532EEBH-9A 8M words x 32 bits Description Pin Configurations The EDS2532EEBH is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the

EDS2516ADTA-75

Contextual Info: PRELIMINARY DATA SHEET 256M bits SDRAM EDS2516ADTA-75 16M words x 16 bits Description Pin Configurations The EDS2516ADTA is 256M bits SDRAMs organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the

EDS2732CABH

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732CABH 8M words x 32 bits Description Pin Configurations The EDS2732CA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

Contextual Info: DATA SHEET 256MB SDRAM SO DIMM EBS25EC8APSA 32M words x 72 bits, 1 bank Description Features The EBS25EC8APSA is 32M words × 72 bits, 1 bank Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (SO DIMM), mounted 9 pieces of 256M bits SDRAM (EDS2508APTA) sealed in TSOP

EDS2532AABJ-6B

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532AABJ-6B 8M words x 32 bits Pin Configurations • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732AABJ-6B 8M words x 32 bits Pin Configurations • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732AABH 8M words x 32 bits Description Pin Configurations The EDS2732AA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532AABH-75 8M words x 32 bits Description Pin Configurations The EDS2532AA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

E0545

Contextual Info: PRELIMINARY DATA SHEET 256M bits SDRAM EDS2516CDTA 16M words x 16 bits Description Pin Configurations The EDS2516CDTA is 256M bits SDRAMs organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732CABH 8M words x 32 bits Description Pin Configurations The EDS2732CA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532AABH-1AR2 8M words x 32 bits Description Pin Configurations The EDS2532AA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

PC133 registered reference design

Abstract: elpida
Contextual Info: PRELIMINARY DATA SHEET 2 GB Registered SDRAM DIMM EBS21RC2ACNZ 256M-word x 72-bit, 2-bank Description Applications The EBS21RC2ACNZ is 256M-word × 72, 2-bank Synchronous Dynamic RAM Registered Module, mounted 72 pieces of 256M-bit SDRAM (EDS2502ACN) sealed in TCP package. This module

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532CABJ 8M words x 32 bits Description Pin Configurations The EDS2532CA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532AABH-75 8M words x 32 bits Description Pin Configurations The EDS2532AA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732AABJ-6B 8M words x 32 bits Description Pin Configurations The EDS2732AA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.

EDS2532CABH

Abstract: E-039
Contextual Info: DATA SHEET 256M bits SDRAM EDS2532CABH 8M words x 32 bits Pin Configurations • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V • Clock frequency: 133MHz/100MHz (max.)

EBS52UC8APFA

Abstract: EBS52UC8APFA-75 EBS52UC8APFA-7A EDS2508APTA
Contextual Info: PRELIMINARY DATA SHEET 512MB Unbuffered SDRAM DIMM EBS52UC8APFA 64M words x 64 bits, 2 banks Description Features The EBS52UC8APFA is 64M words × 64 bits, 2 banks Synchronous Dynamic RAM Registered Module, mounted 16 pieces of 256M bits SDRAM (EDS2508APTA) sealed in TSOP package.

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732AABJ-6B 8M words x 32 bits Specifications Pin Configurations • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V

EDS2732AABH-75

Contextual Info: DATA SHEET 256M bits SDRAM EDS2732AABH-75 8M words x 32 bits Specifications Pin Configurations • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V

Contextual Info: DATA SHEET 256M bits SDRAM EDS2532CABJ 8M words x 32 bits Specifications Pin Configurations • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V

EDS2508AFTA

Abstract: AX12 eds2508af
Contextual Info: DATA SHEET 256M bits SDRAM EDS2508AFTA-7A 32M words x 8 bits Specifications Pin Configurations • Density: 256M bits • Organization  8M words × 8 bits × 4 banks • Package: 54-pin plastic TSOP (II)  Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V