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Contextual Info: PRELIMINARY DATA SHEET 128M bits SDRAM Bare Chip ECS1232JCCN-A 4M words x 32 bits Features • Density: 128M bits • Organization 1M words × 32 bits × 4 banks Package: Bare chip • Power supply: VDD, VDDQ = 2.5V ± 0.2V • Clock frequency: 133MHz (max.) |
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ECS1232JCCN-A 133MHz cycles/64ms M01E0107 E0779E20 |