EDD2516AMTA-6B-E
Abstract: auto-10
Contextual Info: DATA SHEET 256M bits DDR SDRAM EDD2516AMTA-6B-E 16M words x 16 bits Description Pin Configurations The EDD2516AMTA is 256M bits Double Data Rate (DDR) SDRAM organized as 4,194,304 words × 16 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer is realized by the 2 bits prefetchpipelined architecture. Data strobe (DQS) both for
|
Original
|
edd2516amta-6b-eedd2516amta66pinm01e0107+2e0749e10auto-10
|
PDF
|
EDD2516AMTA-6B-E
Abstract: BT122
Contextual Info: DATA SHEET 256M bits DDR SDRAM EDD2516AMTA-6B-E 16M words x 16 bits Description Pin Configurations The EDD2516AMTA is 256M bits Double Data Rate (DDR) SDRAM organized as 4,194,304 words × 16 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer is realized by the 2 bits prefetchpipelined architecture. Data strobe (DQS) both for
|
Original
|
edd2516amta-6b-eedd2516amta66pin66-pin+3m01e0107e0749e10bt122
|
PDF
|