E008 Search Results

E008

Abstract: NLG4003
Contextual Info: NSGD E008 NEL 21 APR. 2000 PRELIMINARY NLG4003 20 Gb/s 2 - INPUT XOR / XNOR The NLG4003 is an ultra-fast 2 input XOR / XNOR operating at up to 20 Gb/s MIN. . Designed with LSCFL (Low-power Source Coupled FET Ijogic), it uses SCFL VO levels ( Vh : 0.0 V ,V l:- 0 .9 V ) .

bst 1046

Contextual Info: HM5425161B Series HM5425801B Series HM5425401B Series 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword x 16-bit × 4-bank/8-Mword × 8-bit × 4-bank/ 16-Mword × 4-bit × 4-bank E0086H20 Ver. 2.0 Jan. 23, 2002 Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM

qml-38535

Abstract: CT211 vs02 VS-01 5962-90932
Contextual Info: DESC FORM 193 SEP 87 D I S T R I B U T I O N S T A T E M E N T A. >U S GOVHNMENT PRINTING OfFICE: 1987 — 748-129/40911 5962-E008 A p p ro v e d lor p u b lic r e le a se ; d istrib u tio n is u n lim ite d . 1. SCOPE 1.1 Scope. This drawing forms a part of a one part - one part number documentation system see

HM5225405BTT-A6

Abstract: HM5225165B
Contextual Info: EO HM5225165B-75/A6/B6 HM5225805B-75/A6/B6 HM5225405B-75/A6/B6 L 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword x 16-bit × 4-bank/8-Mword × 8-bit × 4-bank /16-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM Pr Description E0082H10 1st edition (Previous ADE-203-1073B (Z)

5962-XXXXXZZ

Abstract: SCR GATE DRIVER SCR T 780 Applications Handbook qml-38535 SCR Applications Handbook SCR Handbook, General electric MIL-STD-480 5962-90932
Contextual Info: DESC FORM 193 > U S G O V H N M E N T P R IN T IN G O fFIC E: 1 9 8 7 — 7 4 8 -1 2 9 /4 0 9 1 1 SEP 87 D IS T R IB U T IO N S T A T E M E N T A. This Material 5962-E008 A p p ro v e d lo r p u b lic re le a s e ; d is trib u tio n is u n lim ite d . C o p y r i g h t e d B y Its R e s p e c t i v e M a n u f a c t u r e r

KX14

Abstract: KX15
Contextual Info: JK f t REV. E008E0PS 2 J OÑO NI M ±o. B DATE ft 053 9 44 B.Deo.2003 REVISED TABLE ñ mDR.m X M S DESCRI PTI ON DON NO. a CHK. - - 2 & & APPD. APPD. xmiRo %júudimfí H.TAKAHASH I i A ±0. 05 0 .8 ( P I T C H 0 .2 5 ( S C A L E ± 0.15 5 ± . 1 0 .7

Contextual Info: HB52F328DC-75B/75BL 256 MB Unbuffered SDRAM S.O.DIMM 32-Mword x 64-bit, 133 MHz Memory Bus, 2-Bank Module 8 pcs of 16 M × 16 components PC133 SDRAM E0085H10 (1st edition) (Previous No. ADE-203-1187A(Z) Jan. 31, 2001 Description The HB52F328DC is a 16M × 64 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory

Contextual Info: HB52RF648DC-B, HB52RD648DC-B 512 MB Unbuffered SDRAM S.O.DIMM 64-Mword x 64-bit, 133/100 MHz Memory Bus, 2-Bank Module 16 pcs of 32 M × 8 components PC133/100 SDRAM E0083H40 (Ver. 4.0) Nov. 16, 2001 (K) Japan Description The HB52RF648DC, HB52RD648DC are a 32M × 64 × 2 banks Synchronous Dynamic RAM Small Outline

Contextual Info: REVISIONS REV 3 DT04-3P-E008 SYM D E S C R 1P T IO N l DATE APPROVED NC NEW RELEASE PER E.O. AI488I 8/18/95 R.D.R A B REVISED PER E.O. AI7530 REVISED PER E.O. A 17814 1I/2S/0I R.D.R "7 -/ to - / a r v e _ NUMERICAL DIGIT . EX: 0 = 2000. CONTACT SIZE 5. THIS RECEPTACLE MATES WITH THE DT06-3S-* PLUG. * = ALL MODIFICATIONS .

p40x

Abstract: MOS41M NEL Clock & Data Recovery Nippon paint E.A 9
Contextual Info: NEL NS GM E008A Preliminary Feb. 29, 2000 MOS41M 10Gb/s CDR/DEMUX Module M O S41M is a m odule w hich w as designed as a receiver o f ST M -64/O C -192 optical transm ission system s. This consists o f PLL type C lock and Data R ecovery CDR and 1:16 D E M U X .

Contextual Info: HB52D328DC-B 256 MB Unbuffered SDRAM S.O.DIMM 32-Mword x 64-bit, 100 MHz Memory Bus, 2-Bank Module 8 pcs of 16 M × 16 components PC100 SDRAM E0084H10 (1st edition) (Previous ADE-203-1188A (Z) Jan. 31, 2001 Description The HB52D328DC is a 16M × 64 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line

HM5225405BTT-75

Contextual Info: HM5225165B-75/A6/B6 HM5225805B-75/A6/B6 HM5225405B-75/A6/B6 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword x 16-bit × 4-bank/8-Mword × 8-bit × 4-bank /16-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM E0082H10 1st edition (Previous ADE-203-1073B (Z)

bst 1046

Abstract: HM5425161B HM5425161BTT-10 HM5425161BTT-75A HM5425161BTT-75B HM5425401B HM5425801B HM5425801BTT-75A HM5425801BTT-75B
Contextual Info: EO HM5425161B Series HM5425801B Series HM5425401B Series 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword x 16-bit × 4-bank/8-Mword × 8-bit × 4-bank/ 16-Mword × 4-bit × 4-bank L Pr Description E0086H20 Ver. 2.0 Jan. 23, 2002

HM5225165BTT

Contextual Info: HB52D328DC-B 256 MB Unbuffered SDRAM S.O.DIMM 32-Mword x 64-bit, 100 MHz Memory Bus, 2-Bank Module 8 pcs of 16 M × 16 components PC100 SDRAM E0084H10 (1st edition) (Previous ADE-203-1188A (Z) Jan. 31, 2001 Description The HB52D328DC is a 16M × 64 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line

Hitachi DSA0087

Abstract: HM5425161B HM5425161BTT-10 HM5425161BTT-75A HM5425161BTT-75B HM5425401B HM5425801B HM5425801BTT-75A 2272 t4
Contextual Info: HM5425161B Series HM5425801B Series HM5425401B Series 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword x 16-bit × 4-bank/8-Mword × 8-bit × 4-bank/ 16-Mword × 4-bit × 4-bank E0086H10 1st edition (Previous ADE-203-1077C (Z) Preliminary

Contextual Info: HM5257165B-75/A6 HM5257805B-75/A6 HM5257405B-75/A6 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword x 16-bit × 4-bank/16-Mword × 8-bit × 4-bank /32-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM E0081H10 1st edition (Previous ADE-203-1237A (Z) Jan. 31, 2001

Contextual Info: 30/12/2013 DT06-2S-E008 Product Details - TE T E C onnec tivity My C art | My Part Lists | Sign In/Register Have a Question? What can we help you find? C hat with a P roduc t I nformation Spec ialis t Products Industries Resources About TE My Account DT06-2S-E008 Product Details

Contextual Info: HB52RF648DC-B, HB52RD648DC-B 512 MB Unbuffered SDRAM S.O.DIMM 64-Mword x 64-bit, 133/100 MHz Memory Bus, 2-Bank Module 16 pcs of 32 M × 8 components PC133/100 SDRAM E0083H20 (2nd edition) Preliminary Feb. 22, 2001 Description The HB52RF648DC, HB52RD648DC are a 32M × 64 × 2 banks Synchronous Dynamic RAM Small Outline

HB54A5128FN-10B

Abstract: HB54A5128FN-B75B HM5425801BTT HB54A5128FN-A75B
Contextual Info: HB54A5128FN-A75B/B75B/10B HB54A5129FN-A75B/B75B/10B 512 MB Unbuffered DDR SDRAM DIMM HB54A5128FN 64-Mword x 64-bit, 2-Bank Module (16 pcs of 32 M × 8 Components) (HB54A5129FN) 64-Mword × 72-bit, 2-Bank Module (18 pcs of 32 M × 8 Components) E0087H10 (1st edition)

Contextual Info: HB52RF648DC-B, HB52RD648DC-B 512 MB Unbuffered SDRAM S.O.DIMM 64-Mword x 64-bit, 133/100 MHz Memory Bus, 2-Bank Module 16 pcs of 32 M × 8 components PC133/100 SDRAM E0083H40 (Ver. 4.0) Nov. 16, 2001 (K) Japan Description The HB52RF648DC, HB52RD648DC are a 32M × 64 × 2 banks Synchronous Dynamic RAM Small Outline

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Abstract: HM5257165B
Contextual Info: EO HM5257165B-75/A6 HM5257805B-75/A6 HM5257405B-75/A6 L 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword x 16-bit × 4-bank/16-Mword × 8-bit × 4-bank /32-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM Pr Description E0081H10 1st edition (Previous ADE-203-1237A (Z)

Contextual Info: PEY NC DT04-2P-E008 SYM NO 2 . 206 REF [ 5 6 . 03 1 fO R E V IS IO N S D E S C R 1P T 1O N R E L E A S E PER £ . 0 . Al 4881 DATE AFPRCVED . 663 REF [ 7,351 r~_zp L ^~ \i ,670 REF [ 17. 021 S l«NATUR£ t DATE OR S- lu A A A D / J r r A i i at* AC CHK 2 WAY RECEPTACLE

HM5225165BTT

Contextual Info: HB52F328DC-75B/75BL 256 MB Unbuffered SDRAM S.O.DIMM 32-Mword x 64-bit, 133 MHz Memory Bus, 2-Bank Module 8 pcs of 16 M × 16 components PC133 SDRAM E0085H10 (1st edition) (Previous No. ADE-203-1187A(Z) Jan. 31, 2001 Description The HB52F328DC is a 16M × 64 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory

Contextual Info: HB54R1G9F2-A75B/B75B/10B 1 GB Registered DDR SDRAM DIMM 128-Mword x 72-bit, 2-Bank Module 36 pcs of 64 M × 4 Components E0089H20 (Ver. 2.0) Preliminary Mar. 30, 2001 Description The HB54R1G9F2 is a 64M × 72 × 2-bank Double Data Rate (DDR) SDRAM Module, mounted 36 pieces of