DYNAMIC RAM NMOS 18 PINS Search Results

RAS 0510

Contextual Info: AEPDX4M8LB DYNAMIC RAM MODULE >> 4,194,304 x 8 Organization > > Low 0.510 inch stand-off height 0.350 using 90 degree lead pins > > 2 8 pin SIP is shorter in length than standard modules > > Single + 5 V p o w er supply > > TTL com patible 4 MEGAWORD BY 8 BIT LOW

LH2464-12

Abstract: LH2464-10 LH2464-15 dynamic ram nmos 18 pins lh2464 AS2v
Contextual Info: LH2464 FEATURES • 65,536 x 4 bit organization • Access times: 100/120/150 ns MAX. • Cycle times: 200/220/260 ns (MIN.) • Page mode, Read-Modify-Write operation • Power supply: +5 V + 10% • Power consumption (MAX.): Operating: 523/457/413 mW (MAX.)

lh2465

Contextual Info: LH2465 FEATURES • 65,536 x 4 bit organization • Access times: 120/150 ns MAX. • Cycle times: 220/260 ns (MIN.) • Nibble-Mode, Read-Modify-Write operation • Power supply: +5 V ± 10% • Power consumption: Operating: 457/413 mW (MAX.) Standby: 27.5 mW (MAX.)

RAS 0510

Abstract: dynamic ram module
Contextual Info: AEPDX1M8LB DYNAMIC RAM MODULE > > 1,048,576 x 8 Organization > > Low 0.510 inch stand-off height 0.350 using 90 degree lead pins > > 2 8 pin SIP is shorter in length than standard modules > > Single +5V power supply > > TTL compatible 1 MEGAWORD BY 8 BIT LOW

1mx1 DRAM

Contextual Info: ADVANCED 3 HZ D E L E C T R O N I C PKG a 02547=13 0 0 0 0 3 5 4 2 E3AEP AEPDX1M8LB DYNAMIC RAM MODULE 7~-¥6-e3 '-/$ > > 1,048,576 x 8 Organization > > Low 0.510 in ch stand-off heig ht 0.350 using 90 degree lead pins > > 2 8 p in SIP is shorter in length than standard m odules

Contextual Info: ADVANCED ELECTRONIC PKG 3 *]E 0 5 5 4 7 = 1 3 Q Q 0035Ö T ESAEP D AEPDX4M8LB DYNAMIC RAM MODULE T '- V 6 - Z 3 - i8 > > 4,194,304 x 8 Organization > > Low 0.510 in ch stand-off h e ig h t 0.350 using 90 degree lead pins > > 2 8 pin SIP is shorter in length than standard m odules

LH2465

Contextual Info: LH2465 FEATURES • 65,536 x 4 bit organization • Access times: 120/150 ns MAX. • Cycle times: 220/260 ns (MIN.) • Nibble-Mode, Read-Modify-Write operation • Power supply: +5 V ± 10% • Power consumption: Operating: 457/413 mW (MAX.) Standby: 27.5 mW (MAX.)

LH2464-12

Abstract: LH2464-10 lh2464 dynamic ram nmos 18 pins LH2464-15 64k nmos dynamic ram TOED30
Contextual Info: LH2464 FEA T U R ES NMOS 256K 64K x 4 Dynamic RAM DESCRIPTION • 65,536 x 4 bit organization • A c c e s s times: 100/120/150 ns (M AX.) • C y c le times: 200/220/260 ns (MIN.) • P a g e mode, Read-M odify-W rite operation T h e LH 2 4 6 4 is a 65,536 x 4 bit d yn a m ic R A M fabri­

Contextual Info: AEPDD4X1M5 4x1 Mx5 DRAM MODULE January 31, 1990 > > Four 1,048,576 x 5 Organization > > Module can be organized into three separate configurations: I. 1M x 20 II. 2M x 10 III. 4M x 5 > > 36 x 2 72 pins SIMM edge clip > > 0.100 inch distance between pins

samsung cmos dram 4m x 4

Contextual Info: FUNCTION GUIDE 4. Ordering Information 4.1 Dynamic RAM KM XX X C XXXX X X X X XX SAMSUNG MEMORY SPEED • 5: 50ns • 6: 60ns • 7: 70ns • 8: 80ns • 1 0 :100ns DEVICE TYPE • • • • • • • • 4: DRAM 42: VRAM 6: SRAM 23: MASK ROM 28: STANDARD EEPROM

Contextual Info: 3TE D ADVANCED ELECTRONIC PKG ES Q2SM7tî3 QDGa3Sb b ElAEP AEPDX1M9L DYNAMIC RAM MODULE ET >> 1,048,576 x 9 Organization > > 3 0 p in SIP > > Low 0.510 in ch stand-off height » O ptional PARITY CHECKER on boa rd > > Single +5V po w e r supply » r-V é -23-l%

AK41128

Abstract: AK42064
Contextual Info: HIGH DENSITY DYNAMIC RANDCM ACCESS MEMORY MODULES ACCUTEK DESCRIPTION The Accutek family of high density dynamic RAM modules are comprised of 64K x 1 or 256K x 1 dynamic RAMs packaged in LCCs or PLCCs along with chip capacitors, mounted to multi-layer ceramic

RAS 0510

Abstract: aepdx1m9l
Contextual Info: AEPDX1M9L DYNAMIC RAM MODULE > > 1,048,576 x 9 Organization > > 3 0 pin SIP > > Low 0.510 inch stand-off height > > Optional PARITY CHECKER on board > > Single + 5 V p o w er supply > > TTL com patible > > Pin for pin com patible with standard modules without parity checker

Contextual Info: ADVANCED ELECTRO NIC PKG BTE D B 05547^3 D0QG3bD fl E3A EP AEPDX4M9L DYNAMIC RAM MODULE > > 4,194,304 x 9 Organization » 3 0 p in SIP > > Low 0.510 inch stand-off height > > O ptional PARITY CHECKER on board » Single +5V p o w e r supply » TTL com patible

Contextual Info: AEPDX4M9L DYNAMIC RAM MODULE >> 4,194,304 x 9 Organization > > 3 0 pin SIP > > Low 0.510 inch stand-off height » Optional PARITY CHECKER on board > > Single + 5 V p o w er supply > > TTL compatible > > Pin for pin com patible with standard modules without parity checker

sje 607

Abstract: SUNYO hamming code FPGA IGLOO2 COOLRUNNER-II examples 8-bit brentkung adder
Contextual Info: Power-Aware FPGA Design by Hichem Belhadj, Vishal Aggrawal, Ajay Pradhan, and Amal Zerrouki February 2009 Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

M41464

Abstract: m41464-10 msm41464 msm41464-10 M4146410
Contextual Info: O K I semiconductor MSM41464 65,536-WORD x 4-BIT DYNAMIC RAM PAGE MODE TYPE GENERAL DESCRIPTION The Oki MSM41464 is a fully decoded, dynamic NMOS random access memory organized as 65,536 words x 4 bits. The design is optimized for high-speed, high performance applications

YS18A

Abstract: MSC2305-10YS18A MSC2305
Contextual Info: OKI semiconductor MSC2305YS18A_ 524,288 BY 9 BIT DYNAMIC RAM MODULE < Page Mode Type > GENERAL DESCRIPTION The Oki MSC2305YS18A is a fully decoded, 524,288 words x 9 bit NMOS dynamic random access memory composed of eighteen 256K DRAMs in plastic leaded chip carrier MSM41256AJS .

Contextual Info: O K I semiconductor MSM41257A 262,144-WORD x 1-BIT DYNAMIC RAM NIBBLE MODE TYPE _ GENERAL DESCRIPTION The Oki MSM41257A is a fully decoded, dynamic NMOS random access memory organized as 262,144 words x 1 bit. The design is optimized for high-speed, high performance applications

Contextual Info: A d vanced In fo rm atio n FU JITSU MOS M em ories • M B 811001-12, M B 811001-15 1,048,576-Bit Dynamic Random Access Memory D escription The Fujitsu MB811001 is a fully decoded, dynamic NMOS random access memory organized as 1,048,576 one-bit words. The design

MSM41464-10

Abstract: MSM41464
Contextual Info: O K I semiconductor MSM41464 65,536-WORD x 4-BIT DYNAMIC RAM PAGE MODE TYPE _ GENERAL DESCRIPTION The Oki MSM41464 is a fully decoded, dynamic NMOS random access memory organized as 65,536 words x 4 bits. The design is optimized for high-speed, high performance applications

PIC16C540

Abstract: PIC16XXX PIC1670 PIC PROGRAMMING CODES picsim 4x13 32x8 EPROM
Contextual Info: & PIC 16xxx M icro ch ip PIC 16xxx Series Microcontroller Family FEATURES PIC EPROM Technology PIC's OTP EPROM technology offers a low cost alterna­ tive to using com petitive ROM based devices for high volum e production. EPROM technology also offers several important cost saving advantages namely:

AS11D

Abstract: C-41256A8 30-pin SIMM
Contextual Info: NEC MC-41256A8 262,144 X 8-Bit Dynamic NMOS RAM Module NEC Electronics Inc. Description Pin Configuration The MC-41256A8 is a 262,144-word by 8-bit NMOS RAM module designed to operate from a single + 5-volt power supply. Advanced dynamic circuitry, including a

Contextual Info: OKI semiconductor MSC2307YS9/KS9_ 262,144 BY 9 BIT DYNAMIC RAM MODULE <Nibble Mode Type> GENERAL DESCRIPTION The Oki MSC2307YS9/KS9 is a fu lly decoded, 262,144 words x 9 b it NMOS dynamic random access memory composed of nine 256K DRAMs in plastic leaded chip carrier MSM41257AJS . The mounting