Part Number
    Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    DV74LS27 Search Results

    DV74LS27 Datasheets (3)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    DV74LS273D
    AVG Semiconductors Octal D Type Flip Flop Plastic Sop Surface Mount Scan PDF 367.73KB 2
    DV74LS273N
    AVG Semiconductors Octal D Type Flip Flop Plastic Dip Through Hole Scan PDF 367.73KB 2
    DV74LS27N
    AVG Semiconductors Triple 3 Input Positive NOR GATE Plastic Dip Through Hole Scan PDF 256.78KB 2

    DV74LS27 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: AVG DDiT Semiconductors Technical Data IO DV74LS27 DV74ALS27 Triple 3-Input NOR Gate >1 N Suffix Plastic DIP AVG-001 Case This device contains three independent gates, each of which performs the logic N O R function. AVG’s LS operates over extended Vcc from 4.5 to 5.5 V


    OCR Scan
    DV74LS27 DV74ALS27 AVG-001 ALS27 1-800-AVG-SEMI DV74LS27, J0101 0Q00QÃ PDF

    ls273

    Abstract: ALS273
    Contextual Info: DDi“ A VG Sem iconductors T ech n ical Data 273 Octal D-Type Edge-Triggered Flip-Flops with Clear DV74LS273 DV74ALS273 N Suffix Plastic DIP A VG -005 Case These positive-edge-triggered flip-flops utilize TTL circuity to implement D-type flip-flop logic with a master reset input.


    OCR Scan
    DV74LS273 DV74ALS273 AVG-005 AVG-006 LS273 DV74LS273. 1-S00-AVG-SEMI ls273 ALS273 PDF

    als273

    Contextual Info: AVG Semiconductors_ DDi Technical Data DV74LS273 DV74ALS273 N Suffix Plastic DIP AVG-005 Case These positive-edge-triggered flip-flops utilize TTL circuity to implement D-type flip-flop logic with a master reset input. • AVG’s LS operates over extended Vcc from 4.5 to 5.5 V


    OCR Scan
    DV74LS273 DV74ALS273 AVG-005 AVG-006 LS273 DV74LS273, 1-800-AVG-SEMI als273 PDF

    ls273

    Abstract: 15df ALS273
    Contextual Info: A VG Semiconductors DDi Technical Data 273 Octal D-Type Edge-Triggered Flip-Flops with Clear DV74LS273 DV74ALS273 These positive-edge-triggered flip-flops utilize TTL circuity to implement D-type flip-flop logic with a master reset input. N Suffix Plastic DIP


    OCR Scan
    DV74LS273 DV74ALS273 AVG-005 AVG-006 LS273 DV74LS273, DW4ALS273 101D11A DD207 1-800-AVG-SEMI ls273 15df ALS273 PDF

    LS27

    Abstract: als27
    Contextual Info: AVG DDi Semiconductors Technical Data DV74LS27 DV74ALS27 Triple 3-Input NOR Gate N Suffix Plastic DIP AVG-001 Case T his device co n ta in s th re e in d e p e n d e n t gates, each o f w hich p e rfo rm s th e log ic N O R function. • AVG’s LS operates over extended Vcc from 4.5 to 5.5 V


    OCR Scan
    DV74LS27 DV74ALS27 AVG-001 AVG-002 ALS27 DV74LS27, 1-800-AVG-SEMI LS27 PDF

    Contextual Info: AVG Semiconductors DDi Technical Data Quad SET-RESET Latch This device consists of four independent set-reset input latches. Two latches have two separate set inputs whereas the other two have one set and one reset. • AVG’s LS operates over extended Vcc from 4.5 to 5.5 V


    OCR Scan
    AVG-003 DV74LS279 DV74ALS279 AVG-004 ALS279 LS279 DV74LS279, PDF