DS92 Search Results

Contextual Info: DS92LV1260 DS92LV1260 Six Channel 10 Bit BLVDS Deserializer Literature Number: SNLS134E DS92LV1260 Six Channel 10 Bit BLVDS Deserializer General Description Features The DS92LV1260 integrates six deserializer devices into a single chip. The chip uses a 0.25u CMOS process technology. The DS92LV1260 can simultaneously deserialize up to

DS92LV18

Abstract: 2003120 ds92lv18tvv
Contextual Info: DS92LV18 DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz Literature Number: SNLS156D DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz General Description Features The DS92LV18 Serializer/Deserializer SERDES pair transparently translates a 18–bit parallel bus into a BLVDS serial

application ds92001

Abstract: DS92001TMA
Contextual Info: DS92001 DS92001 3.3V B/LVDS-BLVDS Buffer Literature Number: SNLS147E DS92001 3.3V B/LVDS-BLVDS Buffer General Description The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across backplanes. One of

Contextual Info: DS92LV16 DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz Literature Number: SNLS138G DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz General Description Features The DS92LV16 Serializer/Deserializer SERDES pair transparently translates a 16–bit parallel bus into a BLVDS serial

92001

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

Contextual Info: DS92LV090A DS92LV090A 9 Channel Bus LVDS Transceiver Literature Number: SNLS025C DS92LV090A 9 Channel Bus LVDS Transceiver General Description Features The DS92LV090A is one in a series of Bus LVDS transceivers designed specifically for the high speed, low power proprietary backplane or cable interfaces. The device operates from

DS92LX1622

Abstract: DS92LX1621 DS92LX1622SQE DS92LX1621SQ "frame grabber"
Contextual Info: DS92LX1621 / DS92LX1622 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel General Description • Embedded clock with DC Balanced coding to support AC- The DS92LX1621 / DS92LX1622 chipset offers a Channel

DS92LV1023E

Abstract: 10-BIT
Contextual Info: DS92LV1023E [x 10 d in TCLK_R/F TCLK 30 MHz to 66 MHz PLL SYNC1 SYNC2 TIMING and CONTROL 10-Bit Deserializer

b10a1

Abstract: 528G
Contextual Info: DS92LV8028 Eight Channel 10:1 Serializer General Description Features The DS92LV8028 integrates eight serializer devices into a single chip. The DS92LV8028 can simultaneously serialize up to eight 10-bit data streams. The 10-bit parallel inputs are LVTTL signal levels. The serialized outputs are LVDS signals

Contextual Info: DS92001 3.3V B/LVDS-BLVDS Buffer General Description The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides an BLVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the "stub length" or

AN-808

Abstract: AN-971 AN-977 DS92LV090A DS92LV090ATVEH
Contextual Info: DS92LV090A 9 Channel Bus LVDS Transceiver General Description Features The DS92LV090A is one in a series of Bus LVDS transceivers designed specifically for the high speed, low power proprietary backplane or cable interfaces. The device operates from a single 3.3V power supply and includes nine differential line drivers and nine receivers. To minimize bus loading,

Contextual Info: DS92LV010A www.ti.com SNLS007D – MAY 2004 – REVISED NOVEMBER 2007 DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver Check for Samples: DS92LV010A FEATURES DESCRIPTION • • • • • • • • • The DS92LV010A is one in a series of transceivers designed specifically for the high speed, low power

Contextual Info: DS92LV18 DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz Literature Number: SNLS156D DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz General Description Features The DS92LV18 Serializer/Deserializer SERDES pair transparently translates a 18–bit parallel bus into a BLVDS serial

Contextual Info: DS92LV3221/DS92LV3222 20-50 MHz 32-Bit Channel Link II Serializer/Deserializer General Description Features The DS92LV3221 SER serializes a 32-bit data bus into 2 embedded clock LVDS serial channels for a data payload rate up to 1.6 Gbps over cables such as CATx, or backplanes FR-4

Contextual Info: SN65LV1023/SN65LV1224 30-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS527F – FEBRUARY 2002 – REVISED NOVEMBER 2002 D D D D 300-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 30-MHz to 66-MHz System Clock Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224

Contextual Info: DS92LV1224 www.ti.com SNLS189 – APRIL 2005 DS92LV1224 30-66 MHz 10 Bit Bus LVDS Deserializer Check for Samples: DS92LV1224 FEATURES • 1 • 23 • • • 30–66 MHz Single 1:10 Deserializer with 300–660 Mb/s troughput Robust Bus LVDS serial data transmission

CON2x20

Abstract: 7476 feature of 7476 DS92LV18 DIN11 SCAN90CP02 SCAN921821 13V3 C4612 R49A
Contextual Info: 5 4 3 2 1 Reference schematic for redundant LVDS transmission D This schematic showcases an application for the following LVDS products by National Semiconductor: SCAN921821, SCAN90CP02, DS92LV18. Information and diagrams herein are provided for reference only. You

SLLS526D

Contextual Info: SN65LV1021/SN65LV1212 10-MHz TO 40-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS526D – FEBRUARY 2002 – REVISED AUGUST 2002 D D D D 100-Mbps to 400-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 40-MHz System Clock Pin-Compatible Superset of NSM DS92LV1021/DS92LV1212

Contextual Info: SN65LV1023/SN65LV1224 30 MHz TO 66 MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS527A – FEBRUARY 2002 – REVISED APRIL 2002 D D D D 300–660 Mbps Serial LVDS Data Payload Bandwidth at 30 MHz to 66 MHz System Clock Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

SN65LVDS1023

Abstract: SN65LVDS1023DB SN65LVDS1224 SN65LVDS1224DB
Contextual Info: SN65LVDS1023/SN65LVDS1224 30 MHz TO 66 MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS527 – FEBRUARY 2002 D D D 300–660 Mbps Serial LVDS Data Payload Bandwidth at 30 MHz to 66 MHz System Clock Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224 Chipset Serializer/Deserializer Power

MO-150

Abstract: SN65LV1023 SN65LV1023DB SN65LV1224 SN65LV1224DB SN65LVDS1023 SN65LVDS1224 300Mbps
Contextual Info: SN65LV1023/SN65LV1224 30-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS527F – FEBRUARY 2002 – REVISED NOVEMBER 2002 D D D D 300-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 30-MHz to 66-MHz System Clock Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224

Contextual Info: DS92UT16 DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers Literature Number: SNOS992D July 19, 2011 DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers 1.0 General Description The DS92UT16 is a flexible UTOPIA to LVDS Bridge device.

MARKING CODE MAZ

Contextual Info: DS92LV2411, DS92LV2412 www.ti.com SNLS302C – MAY 2010 – REVISED APRIL 2013 DS92LV2411/DS92LV2412 5-50MHz 24-Bit Channel Link II Serializer and Deserializer Check for Samples: DS92LV2411, DS92LV2412 FEATURES DESCRIPTION • • • The DS92LV2411 Serializer / DS92LV2412