DS373 Search Results

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

Contextual Info: P S G E C p l e s s e y DS3735 • 3.2 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP 1C Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

DS3738

Abstract: SP8400 SP8401 SP8402 SP8402/KG/MPES
Contextual Info: SP8402 Very Low Phase Noise Divider by 2N DS3738 - 2.1 March 1994 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been

Contextual Info: VP2614 DS3735 - 3.2 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

0231 SP

Contextual Info: @ M IT E L SP8400 _ Very Low Phase Noise Synthesiser Divider SEMICONDUCTOR DS3739 - 2.1 The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter. This gives a minimum

DS3738

Abstract: SP8400 SP8401 SP8402
Contextual Info: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

Contextual Info: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise

DS3738

Abstract: SP8400 SP8401 SP8402
Contextual Info: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise

divide by 100 prescaler

Abstract: BF569 SP8400
Contextual Info: SP8400 Very Low Phase Noise Synthesiser Divider DS3739 The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter. This gives a minimum division ratio of 56 64 for fractional - N synthesis

Contextual Info: g | M ITEL VP2614 H.261 Video De-Multiplexer SEM ICONDUCTOR Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H .261 bitstream. Outputs error corrected run

SP8402

Abstract: DS3738 SP8400 SP8401
Contextual Info: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise

Contextual Info: « t t l GEC PLESSEY ADVANCE INFORMATION C O l \I M I U CU1 O I KI SI E PS L l Mi l iI M DS3735 - 2.5 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in December 1993 Digital Video S DSP 1C Handbook, HB3923-1) FEATURES DESCRIPTION Fully integrated H.261 video de-multiplexer

Contextual Info: SP8400 Very Low Phase Noise Synthesiser Divider DS3739 The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter. This gives a minimum division ratio of 56 64 for fractional - N synthesis

Contextual Info: s ilt "1 c 1<1S? Si GEC PL ES S EY JU N E 1993 PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS3735- 1.4 VP2614 H.261 VIDEO DE-MULTIPLEXER FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer I Inputs an H.261 bitstream. Outputs error corrected run

Contextual Info: P ^ pjl G E C P L E S S E Y SEPTEMBER 1994 PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS3736 • 2.4 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in December 1993 Digital Video & DSP 1C Handbook, HB3923-1 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer

Contextual Info: M ITEL SP8402 Very Low Phase Noise Divider by 2N SEMICONDUCTOR DS3738 - 2.1 The SP8402 is a very low phase noise divider which divides by powers of two. The SO, S 1, S2 data inputs select the division ratio in the range 2 1to 28. Special circuits techniques have been

H.261 encoder chip

Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

DW9248

Contextual Info: 37bfl522 5Ë 0010^20 04^ GEC PLESSEY IPLSB SEMICONDUCTORS DS3736-1.2 DW9248 71.0MHz LOW LOSS SAW I.F. FILTER FOR PERSONAL COMMUNICATIONS The DW9248 has been specifically designed for GSM digital Personal Communications Applications, where the first I.F. filter stage is typically in the 60-80MHZ range. The filter

Contextual Info: MITEL SP8402 Very Low Phase Noise Divider by 2N SEMICONDUCTOR DS3738 - 2.1 The SP8402 is a very low phase noise divider which divides by powers of two. The SO, S 1, S2 data inputs select the division ratio in the range 2 1to 28. Special circuits techniques have been

BF569

Abstract: SP8400 cmos 4103 low noise divide by 2
Contextual Info: SP8400 Very Low Phase Noise Synthesiser Divider DS3739 The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter. This gives a minimum division ratio of 56 64 for fractional - N synthesis

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

DS3738

Abstract: SP8400 SP8401 SP8402
Contextual Info: SP8402 Very Low Phase Noise Divider by 2N DS3738 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise