DS26C32CJ Search Results

Contextual Info: DS26C32C PRELIMINARY National Sem iconductor DS26C32C Quad Differential Line Receiver General Description Features The DS26C32 is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmis­

DS26C32C

Abstract: DS26C32 DS26C32CN DS26C32CJ DS26C32MJ DS26C32CM
Contextual Info: NATL SEMICON] {HEI10RY> IDE D | b S O l i a t D D b S S B l =1 | National Semiconductor PRELIMINARY T -75-45-05 General Description Features • ■ ■ ■ ■ ■ ■ ■ CO Low power CMOS design +0.2V sensitivity over the entire common mode range Typical propagation delays: 20 ns