DS2141 Search Results

diode

Abstract: DS2141 TR54016 ads 96r
Contextual Info: DS2141 FULL DATA SHEET AVAILABLE - CALL - 214-450-3836 DALL AS S E M I C O N D U C T O R CORP S b l M l B O DDQ5fc.7b 5 • DAL SGE D DALLAS SEMICONDUCTOR DS2141 T1 Controller PIN ASSIGNMENT FEATURES • DS1 transceiver • Parallel Control Port • Frames to D4, ESF, and SLC-96n formats

Contextual Info: DS2190-003 DALLAS SEMICONDUCTOR DS2190-003 T1 Network Interface Unit NIU PIN ASSIGNMENT FEATURES • Modularized network interface for 1.544 Mbps T 1 ser­ vices • Network side connects directly to T1 line • Compatible with DS2180A or DS2141A T1 /ISDN Pri­

Contextual Info: DS2141A DALLAS SEMICONDUCTOR D S 2141A T1 Controller PIN ASSIGNMENT FEATURES • DS1/ISDN-PRI framing transceiver TCLK [ t TSER C 2 • Frames to D4, ESF, and SLC-96 formats TCHCLK [ 3 TPOS [ 4 • Parallel control port TNEG [ 5 • Onboard, dual two-frame elastic store slip buffers

DS2141A

Abstract: DS2151
Contextual Info: DS2141A/DS2151 Application Note Programming, D4 Framing Applications June 22, 1994 Transmit Framing In D4 framing applications, the transmit side of the DS2141A and DS2151 can be set up to automatically insert both the Ft and the Fs framing pattern. To have the devices insert the Ft pattern, set the TCR1.6 bit to zero. To have the devices

bv9 transistor

Abstract: 2F 1 marking slc 500 circuit diagram DS2141A DS2141Q DS2186 DS2187 DS2188 DS2290 DS2291
Contextual Info: DS2141A DS2141A T1 Controller FEATURES PIN ASSIGNMENT • DS1/ISDN–PRI framing transceiver TCLK 1 40 VDD TSER 2 39 TSYNC TCHCLK 3 38 TLINK TPOS 4 37 TLCLK TNEG 5 36 INT1 AD0 6 35 INT2 • Extracts and inserts robbed–bit signaling AD1 7 • Programmable output clocks

TR54016

Abstract: ANSI T1.403 DS2141A DS2291
Contextual Info: COMMUNICATIONS CIRCUITS Application Note 454: May 08, 2001 App Note 328: DS2141A Creating a DS/ESF Channel Service Unit Figure 1 Notes: 1. This application uses "looped" timing i.e., RCLK is tied to TCLK 2. MHz clock source is used as a transmit clock if no signal exists on the receive side; if

AN302

Abstract: AN-302 APP302 DS2141 DS2151 DS2153
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS Keywords: multiplex, backplane, framers, clock operation, T1 controller, single chip transceiver, SCT, E1 framer, T1 framer May 01, 2001 APPLICATION NOTE 302 DS2141, DS21Q41, DS21Q43 8-MHz System Clock Operation

DS2141A

Abstract: DS2151
Contextual Info: COMMUNICATIONS CIRCUITS Application Note 464: Aug 10, 2001 App Note 339: DS2141A, DS2151 D4 Framing Applications Application note 339 discusses D4 framing applications, including transmit D4 framing and Yellow Alarm options for the DS2141A and DS2151 transceivers.

TR54016

Abstract: DS21352 DS2141A DS2151 DS2152 DS2155 DS21552 ANSI T1.403
Contextual Info: Maxim > App Notes > TELECOM Keywords: framer, SCT, single chip transceiver, AT&T, TR54016, ANSI, T1.403, FDL, facility data link, PRM, performance report message, ESF May 11, 2001 APPLICATION NOTE 461 Programming and Controlling the FDL on DS2141A, DS2151

Contextual Info: 0S2141 FULL DATA SHEET AVAILABLE - CALL - 214-450-3836 DALLAS SEMICONDUCTOR DS2141 T1 Controller PIN ASSIGNMENT FEATURES • DS1 transceiver C 1 C 2 TCHCLK C 3 TSER C 4 TLINK C 5 TLCLK C 6 TPOS C 7 TNEG C a TSYNC • Parallel Control Port ^ • Frames to D4, ESF, and SLC-96R formats

Contextual Info: DS2141A DALLAS D S 2 1 4 1 A T1 Controller SEMICONDUCTOR FEATURES PIN ASSIGNMENT • DS1/ISDN-PRI framing transceiver • Frames to D4, ESF, and SLC-96 formats • Parallel control port TCLK [ 1 40 ] TSER [ 2 39 ] TSYNC TCHCLK [ 3 38 ] TUNK TPOS [ 4 37 ] TLCLK

DS21354

Abstract: DS2141A DS2143 DS2151 DS2152 DS2153 DS2154 DS2155 DS21554 DS21Q41B
Contextual Info: Application Note 301 Legacy T1/E1 8MHz Backplane Operation www.maxim-ic.com INTRODUCTION This application note applies to the following products: T1 FRAMERS DS2141A DS21Q41B E1 FRAMERS DS2143 DS21Q43A T1 SCTs DS2151 DS2152 E1 SCTs DS2153 DS2154 This application note will discuss the requirements for multiplexing four PCM streams into one 8MHz system

44-PIN

Abstract: DS2141A DS2141Q DS2186 DS2187 DS2188 DS2291
Contextual Info: DS2141A DALLAS SEMICONDUCTOR D S 2 1 4 1 A T1 Controller PIN ASSIGNMENT FEATURES • DS1/ISDN-PRI framing transceiver 40 ] VDD 39 ] TSYNC 3 38 ] TLINK TPOS C 4 37 ] TNEG C 5 36 ADO C 6 C7 C8 35 AD1 34 ] 33 ] TCLK C 1 TSER • Frames to D4, ESF, and SLC-96 formats

MT8980 application

Abstract: AN313 DS2143 MT8980 APP313 DS2141A DS2151 DS2153 MT8980D An-313
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS TELECOM Keywords: DS2141A, DS2143, DS2151, DS2153, interface, Mitel, MT8980, loop, loop-time May 07, 2001 APPLICATION NOTE 313 DS2141A, DS2143, DS2151, DS2153 Interfacing to the Mitel MT8980D Abstract: This application note describes how the DS2141A, DS2143, DS2151, and DS2153 interface to the

DS2141A

Abstract: DS2143 DS2151 DS2153 MT8980D
Contextual Info: COMMUNICATIONS CIRCUITS TELECOM May 07, 2001 App Note 313: DS2141A, DS2143, DS2151, DS2153 Interfacing to the Mitel MT8980D This application note describes how the DS2141A, DS2143, DS2151, and DS2153 interface to the Mitel MT8980D. This note also shows waveforms

MULTIPLEXER IC

Abstract: AN440 DS2141A DS2151 DS2153
Contextual Info: COMMUNICATIONS CIRCUITS Application Note 440: May 07, 2001 App Note 314: DS2141A, DS2142, DS2151, DS2153 Per-Channel Loopback Application Note 314 provides the design requirements for implementing a per-channel loopback application using the Dallas Semiconductor/Maxim DS2141A, DS2142,

AN436

Abstract: M3488 DS2141A DS2143 DS2151 DS2153 DS2141
Contextual Info: COMMUNICATIONS CIRCUITS Application Note 436: May 04, 2001 App Note 308: DS2141A, DS2143, DS2151 and DS2153 Interfacing to the SGSThomson M3488 This application note describes how the DS2141A, DS2143, DS2151, and DS2153 interface to the SGS-Thomson M3488. Also shown are waveforms and timing

Contextual Info: DS2141A T1 Controller www.dalsemi.com FEATURES PIN ASSIGNMENT DS1/ISDN-PRI framing transceiver Frames to D4, ESF, and SLC-96 formats Parallel control port Onboard, dual two-frame elastic store slip buffers Extracts and inserts robbed-bit signaling Programmable output clocks

SLC96

Abstract: SLC-96 TR-TSY-000008 DS2141A DS2151 DS2152 DS21FF42 DS21FT42 DS21Q41B DS21Q42
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS TELECOM Keywords: T1, framer, SCT, single chip transceiver, AT&T, SLC96, SLC-96, TR-08, T1 framers May 31, 2001 APPLICATION NOTE 345 DS21352/552, DS2151, DS2152, DS2141A, DS21Q42 Programming SLC-96 Abstract: This application note describes how to use the SLC-96 mode found in all Dallas Semiconductor T1

CH24B

Abstract: ch8b diode ch9 TS10 CH22A ch6b CH16B CH18A CH21A DS2151
Contextual Info: Application Note 310 D4 Framing and Signaling www.maxim-ic.com INTRODUCTION This application note applies to the following products: T1 FRAMERS T1 SCTs DS2141A DS21Q41B DS21Q42 DS21FF42 DS21FT42 DS2151 DS2152 DS21352 DS21552 DS21Q352 DS21Q552 All Dallas Semiconductor T1 framers and single-chip transceivers SCTs provide support for D4 framing and

DS2141A

Abstract: DS2141Q DS2143 DS2143Q MC68360 MC68MH360
Contextual Info: COMMUNICATIONS CIRCUITS May 08, 2001 App Note 320: DS21Q41, DS21Q43 Interfacing to the MC68MH360 QUICC32 This application note contains information necessary to interface the Motorola MC68360 processor to the DS2141Q or the DS2143Q Dallas Semiconductor T1 or E1 framers. The application note covers interfacing

Contextual Info: DS2141A DALLAS SEMICONDUCTOR D S 2 1 4 1 A T1 Controller PIN ASSIGNMENT FEATURES • DS1/ISDN-PR1 framing transceiver TCLK • Frames to D4, ESF, and SLC-96 formats TSER C1 C2 TCHCLK [ 3 TPOS [ 4 • Parallel control port J TUNK 37 ] TLCLK 38 TNEG [ 5 36 ] I n t T

00FF

Abstract: AN463 how to set alarm DS2141A DS2151
Contextual Info: COMMUNICATIONS CIRCUITS Application Note 463: Aug 10, 2001 App Note 338: DS2141A, DS2151 Alarm Set and Clear Criteria Alarm Set Criteria Clear Criteria Blue Alarm AIS (see note 1 below) when over a 3ms window, 5 or less when over a 3ms window, 6 or more

DS1000-100

Abstract: DS2151 DS2153
Contextual Info: DS2141A/43/51/53 Application Note PCM Interface, Three Channel Drop & Insert July 18, 1994 DS2141A/43/51/53 RSYNC Channel 1 TSYNC Bursty Clock Receive Data Transmit Data RSER RNEG RPOS RCLK TCLK TPOS TNEG RCHCLK A RCHBLK Decoder TCHBLK B C D TCHCLK A Mux TSER