DS200968 Search Results

Contextual Info: November 2004 EQ50F100 6.25 Gbps Backplane Equalizer General Description Features The EQ50F100 is a 6.25 Gbps equalizer designed to compensate transmission medium losses and reduce the medium-induced deterministic jitter. It is optimized for printed circuit backplane for up to 30" of FR4 striplines with backplane connectors at both ends. It is code independent, and

AN-1187

Abstract: EQ50F100 EQ50F100LR SDE06A K28-5 CML100
Contextual Info: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない 場合があります。製品のご検討およびご採用に際しては、必ず最新の英文デー タシートをご確認ください。

AN-1187

Abstract: EQ50F100 EQ50F100LR SDE06A
Contextual Info: EQ50F100 1Gbps - 6.25 Gbps Backplane Equalizer General Description Features The EQ50F100 is a equalizer designed to compensate transmission medium losses and reduce the mediuminduced deterministic jitter. It is optimized for operation from 1Gbps to 6.25Gbps, on printed circuit backplane for up to

EQ50F100

Abstract: SDE06A
Contextual Info: February 2005 EQ50F100 1Gbps - 6.25 Gbps Backplane Equalizer General Description Features The EQ50F100 is a equalizer designed to compensate transmission medium losses and reduce the mediuminduced deterministic jitter. It is optimized for operation from 1Gbps to 6.25Gbps, on printed circuit backplane for up to

PRBS10

Abstract: K28-5 K28 f PRBS-10 AN-1187 EQ50F100 EQ50F100LR SDE06A EB05
Contextual Info: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない 場合があります。製品のご検討およびご採用に際しては、必ず最新の英文デー タシートをご確認ください。