DS100033 Search Results

Contextual Info: DS90CF383 National Semiconductor DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data

DS90CF383

Abstract: DS90CF383MTD DS90CF384 DS90CF583 DS90CF584 MTD56
Contextual Info: DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz General Description Features The D S90C F383 tra n sm itte r converts 28 bits of C M O S /TTL data into fo u r LVDS (Low Voltage D ifferential Signaling) data stream s. A phase-locked transm it clock is transm itted in par­

Contextual Info: Preliminary Technical Information PolarTM P & N-Channel Power MOSFET Common Drain Topology P CH. N CH. - 200V 200V - 17A 26A RDS on 170mΩ Ω 60mΩ Ω trr(typ) 240ns 150ns FMP26-02P VDSS 43 ID25 T1 5 34 T2 (Electrically Isolated Tab) 11 22 Symbol Test Conditions

Contextual Info: Preliminary Technical Information PolarTM P & N-Channel Power MOSFET Common Drain Topology FMP26-02P P CH. N CH. - 200V 200V - 17A 26A RDS on 170mΩ Ω 60mΩ Ω trr(typ) 240ns 150ns VDSS 43 ID25 T1 5 34 (Electrically Isolated Tab) T2 11 22 Symbol Test Conditions

DS90CF383

Abstract: DS90CF383MTD MTD56
Contextual Info: DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle

Contextual Info: Semiconductor DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz Features • 20 to 65 MHz sh ift clock support This chipset is an ideal m eans to solve EMI and cable size problem s associated with w ide, high speed T T L interfaces.

DS90CF383

Abstract: DS90CF383MTD MTD56
Contextual Info: DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link—65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle

Contextual Info: DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link-65 MHz Literature Number: SNLS005 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL

DS90CF383

Abstract: DS90CF383MTD MTD56
Contextual Info: General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle

DS90CF383

Abstract: DS90CF383MTD MTD56
Contextual Info: DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle

DS90CF383

Abstract: DS90CF383MTD MTD56
Contextual Info: DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle

Contextual Info: DS90CF383 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display FPD Link-65 MHz Literature Number: SNLS005 DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link— 65 MHz General Description Features The DS90CF383 transmitter converts 28 bits of CMOS/TTL

Contextual Info: + DS90CF383 D i s p l a y F P D L i n k — 65 M H z • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ This chipsel is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interlaces. 20 to 65 MHz shitt clock support Single 3.3V supply

FMP26-02P

Abstract: IXYS Class D Switching Amplifiers
Contextual Info: Advance Technical Information PolarTM P & N-Channel Power MOSFET Common Drain Topology FMP26-02P P CH. N CH. - 200V 200V - 17A 26A RDS on 170mΩ Ω 60mΩ Ω trr(typ) 240ns 150ns VDSS 43 ID25 T1 5 34 T2 11 22 Symbol Test Conditions ISOPLUS i4-PakTM Maximum Ratings