DS0207 Search Results

B 722 P

Contextual Info: Flexibility & Innovation … DS0207_04 11.04.02 D ATA SHEET TSF0942-02 942.5 MHZ EGSM SAW FILTER PRELIMINARY SPECIFICATION P ACKAGE SMD3.8 D B E A F Ø LOW LOSS 3.8 mm C P RODUCT F EATURES: Ø HIGH REJECTIONS Ø SMALL SMD PACKAGE F B E C D 1.3 mm Typ. A T EMEX S.A.W.

FPAA

Abstract: AN220D04-DEVLP AN220D04-EVAL AN220E04 AN220E04-QFPSP AN220E04-QFPTR AN220E04-QFPTY J-STD-020A
Contextual Info: AN220E04 Datasheet Dynamically Reconfigurable FPAA www.anadigm.com DS020700-U001 e -1 - D iscla im e r A nad ig m re serves the right to m ake any c ha nges w ith o u t fu rth e r notice to any products herein. A nad ig m m a kes no w arranty, represe ntatio n o r gu aran tee regarding the suita bility o f its products fo r any p a rticular purpose, nor does

Contextual Info: AN220E04 Datasheet Dynamically Reconfigurable FPAA www.anadigm.com DS020700-U001F -1- Disclaimer Anadigm reserves the right to make any changes without further notice to any products herein. Anadigm makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does

Contextual Info: Flexibility & Innovation …. DS0207.2 11/06/01 DATA SHEET TSF0942-02 942.5 MHZ EGSM SAW FILTER PRELIMINARY SPECIFICATION PACKAGE 3.8X3.8 MM SMD D B E A F PRODUCT FEATURES : Ø LOW LOSS 3.8 mm C Ø HIGH REJECTIONS Ø SMALL SMD PACKAGE B E C D 1.3 mm Typ. F

AN220E04

Abstract: AN220D04-DEVLP AN220D04-EVAL AN220E04-QFPSP AN220E04-QFPTR AN220E04-QFPTY AN221E04 J-STD-020A
Contextual Info: AN220E04 Datasheet Dynamically Reconfigurable FPAA www.anadigm.com DS020700-U001F -1- Disclaimer Anadigm reserves the right to make any changes without further notice to any products herein. Anadigm makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does

TTSI016641BL-1

Abstract: STSI-144 TSI-16
Contextual Info: Advance Information May 2002 TSI-16 Time-Slot Interchanger Product Description Introduction Features This document is a high-level description for the TSI-16 time-slot interchanger device. The features and functions of the device are listed and explained at a level intended to meet the needs of the system

vpw mode 01

Abstract: JEDECMO220 QFN "200 pin" PACKAGE DIN-50900 10g modulator NRZ
Contextual Info: Preliminary Data Sheet February 2003 TMOD0110G5YP1 10 Gbits/s Modulator Driver Features Applications • Operation to 10.7 Gbits/s NRZ ■ Optical transmitters using EAMs, EMLs, or DMLS ■ Complementary outputs adjustable to 2.7 Vp-p each RL = 50 Ω ■

TS127 08

Abstract: RXD55 RXD01 txd45 RXD4-8 RXD35 TSI-16 RXD26 TXD38 TXD37
Contextual Info: Advance Information May 2003 TSI-16 Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. TSI-16 device. Information relevant to the use of the device in a board design is covered. Ball descriptions, dc electrical characteristics,

AN220D04-DEVLP

Abstract: AN220D04-EVAL AN220E04 AN220E04-QFPSP AN220E04-QFPTR AN220E04-QFPTY J-STD-020A DS020-7
Contextual Info: AN220E04 Datasheet Dynamically Reconfigurable FPAA PRELIMINARY INFORMATION www.anadigm.com This information is preliminary information — subject to change Disclaimer Anadigm reserves the right to make any changes without further notice to any products herein. Anadigm makes no

STSI-144

Abstract: TSI-16 TTSI016641BL-1
Contextual Info: Advisory July 2002 TSI-16 Time-Slot Interchanger Introduction TXD Precharge Resistors This document describes technical issues that are known to exist with the device and/or the documentation of the device. TXD[23:00] are not properly equipped with precharge

fargo maestro 100 AT Command

Abstract: gsm modem sim 900 MAESTRO-20 MAESTRO-100 fargo maestro AT Command Wavecom AT Command 07.07 gsm modem circuit Wavecom AT Commands gsm modem maestro-20 Wavecom
Contextual Info: GSM100LITE GSM100T GSM & GPRS MODEM • • • • • • • • • • • • • GSM and GPRS Voice / Fax / SMS and Data Dual Band 900 / 1800MHz GSM Transmission Full voice call, SMS support Accepts Standard SIM Card Data enabled SIM Cards available

TRCV0111G

Abstract: GR-253
Contextual Info: Data Sheet September 17, 2002 TRCV0111G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

LCK4801

Abstract: LCK4802 MPC998
Contextual Info: Advance Data Sheet December 2001 LCK4802 Low-Voltage PECL Differential Clock General Features The LCK4802 is a low-voltage, 3.3 V PECL differential clock synthesizer. The LCK4802 supports two differential PECL output pairs with frequencies from 336 MHz to 1 GHz. The clock is designed to

0x0041E

Abstract: csg 6522 TSI-16 0x0040c 0X00002
Contextual Info: Advance Information May 2002 TSI-16 Time-Slot Interchanger Register Description Introduction Acronyms Used This document defines the address map for the TSI-16 and describes the purpose and operation of each register bit, its dependencies, and its initial

1430H5

Abstract: 20-PIN EIA-625 GR-253-CORE GR-468-CORE
Contextual Info: a8e re AdLib OCR Evaluation systems Data Sheet December 2001 NetLightO 1430H5-Type SONET/SDH Long-Reach Transceivers with Clock Recovery . Wide dynamic range receiver with InGaAs PIN photodetector . LVTTL signal-detect output . Low power dissipation . Raised ECL LVPECL logic data interfaces