54LS74
Abstract: 54LS74DMQB DM74LS74A 54LS74FMQB 54LS74LMQB DM54LS74AJ DM54LS74AW DM74LS74AM DM74LS74AN E20A
Contextual Info: S E M IC O N D U C T O R tm hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs. General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outÂ
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OCR Scan
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DM74LS74A
54LS74
54LS74DMQB
DM74LS74A
54LS74FMQB
54LS74LMQB
DM54LS74AJ
DM54LS74AW
DM74LS74AM
DM74LS74AN
E20A
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DM74LS74AN
Abstract: DM74LS74A 54LS74 54LS74DMQB 54LS74FMQB 54LS74LMQB DM54LS74AJ DM54LS74AW DM74LS74AM DS006373
Contextual Info: DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.
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Original
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DM74LS74A
DM74LS74AN
DM74LS74A
54LS74
54LS74DMQB
54LS74FMQB
54LS74LMQB
DM54LS74AJ
DM54LS74AW
DM74LS74AM
DS006373
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DM74LS74A
Abstract: DM74LS74AM DM74LS74AN DM74LS85ASJ M14A M14D MS-001 N14A DSA0010771
Contextual Info: Revised March 2000 DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the
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Original
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DM74LS74A
DM74LS74A
DM74LS74AM
DM74LS74AN
DM74LS85ASJ
M14A
M14D
MS-001
N14A
DSA0010771
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