DS005983 Search Results

cd4094bcj

Abstract: DS005983 74LS CD4094B CD4094BC
Contextual Info: CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs General Description Features The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of

Contextual Info: EM IC O N D U C TQ R r CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs General Description Features The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of

CD4094BC

Abstract: 74LS CD4094BCN CD4094BCWM M16B MS-001 MS-013 N16E
Contextual Info: Revised January 1999 CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs General Description The CD4094BC consists of an 8-bit shift register and a 3STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of

74LS

Abstract: CD4094BC CD4094BCN CD4094BCWM M16B MS-001 MS-013 N16E
Contextual Info: Revised January 1999 S E M I C O N D U C T O R TM CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs General Description the latch to 3-STATE output gates. These gates are enabled when O U TP U T ENABLE is taken HIGH. T h e C D 4094BC consists of an 8 -bit shift register and a 3STATE 8-bit latch. Data is shifted serially through the shift

4094BC

Abstract: CD4094BCN application CD4094BC CD4094BCN 74LS CD4094BCWM M16B MS-001 MS-013 N16E
Contextual Info: Revised April 2002 CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs General Description Features The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of the last stage QS can be used to cascade several

CD4094BCJ

Abstract: CD40948 74LS CD4094B CD4094BC CD4094BCN J16A 280NS
Contextual Info: EM ICDNDUCTOR t General Description Features The C D 4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of th e clock. T he output of the last stage Q s can be used to cascade several devices.