RS423
Abstract: DS7820 DS78C120 J16A
Contextual Info: DS78C120 Dual CMOS Compatible Differential Line Receiver General Description Features The DS78C120 is a high performance, dual differential, CMOS compatible line receiver for both balanced and unbalanced digital data transmission. The inputs are compatible
|
Original
|
ds78c120ds7820rs423j16a |
PDF
|
01AE
Abstract: HEART BEAT SENSOR nmis 3007 16C54 AN585 PIC16C54 PIC16C57 PIC16C64
Contextual Info: AN585 A Real-Time Operating System for PICmicro Microcontrollers Why do I Need a Real-Time Kernel? Author: Jerry Farmer Myriad Development Company INTRODUCTION Ever dream of having a Real-Time Kernel for the PIC16CXXX family of microcontrollers? Or ever wonder what Multitasking or Threads are all about? Then
|
Original
|
an585pic16cxxxds00585b-page01ae+6heart beat sensornmis 300716c54pic16c54pic16c57pic16c64
|
PDF
|
MM74C48N
Abstract: BCD-TO-7-SEGMENT DECODER 11 pin 7 segment filament MM74C48 MS-001 N16E
Contextual Info: Revised January 1999 MM74C48 BCD-to-7 Segment Decoder General Description Features The MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. Seven NAND gates and one driver are connected in pairs
|
Original
|
mm74c48mm74c48nbcd-to-7-segment decoder11 pin 7 segment filament+2ms-001n16e
|
PDF
|
|
Contextual Info: October 1987 Revised January 1999 SEMICONDUCTOR!!^ the enable must be changed to a high level disabled only while the clock is HIGH. General Description Features • Wide supply voltage range: ■ Guaranteed noise margin: Qy, highest-order bit (P7) first. New serial data may be
|
OCR Scan
|
|
PDF
|
|
Contextual Info: s e m ic o n d u c t o r Revised Ja nuary 1999 MM74C89 64-Bit 3-STATE Random Access Read/Write Memory General Description A ddress O peration: Address inputs must be stable tsA prior to the positive to negative transition of m em ory enable. It is thus not necessary to hold address inform ation
|
OCR Scan
|
mm74c8964-bit |
PDF
|
PIC16C56
Abstract: 200B AN581 PIC16C54 PIC16C55 PIC16C57 PIC16C5X RG41 PIC16C58 AN5* MICROCHIP
Contextual Info: AN581 Implementing Long Calls Author: Mark Palmer Microchip Technology Inc. INTRODUCTION This application note discusses how to implement “long calls” in the PIC16C5X architecture. The use of long call can simplify the partitioning of the application program
|
Original
|
an581pic16c5xpic16c57pic16c58+711-bitspic16c56200bpic16c54pic16c55rg41an5* microchip
|
PDF
|
200B
Abstract: AN588 NC38 PIC16C5X PIC17CXXX RG41 disc Piezoelectric crystal
Contextual Info: AN588 PICmicro Microcontroller Oscillator Design Guide Design Challenges Author: Kim Peck Consultant Designing a clock oscillator without some knowledge of the fundamental principals of acoustic resonators is possible but fraught with the uncertainty of "cut and try"
|
Original
|
an588200bnc38pic16c5x+3pic17cxxxrg41disc piezoelectric crystal
|
PDF
|
200B
Abstract: AN583 DK-2750 PIC17C42 RG41
Contextual Info: AN583 Implementation of the Data Encryption Standard Using PIC17C42 Authors: Al Lovrich Mark Palmer Microchip Technology Inc. INTRODUCTION In January 1977, The United States government adopted a product cipher developed by IBM as its official encryption standard [1]. This algorithm, called the
|
Original
|
an583pic17c42200bdk-2750+1rg41
|
PDF
|
schematic 20 pin lcd laptop
Abstract: PIC18f interfacing with graphical lcd GRAPHICAL LCD PINS AND INTERFACING DIAGRAM cs5460 adc code example DS91084 schematic 30 pin lcd laptop PIC18F8XXX DS00587 schematic 20 pin lcd laptop 14 PIC16F913
Contextual Info: LCD PICmicro MCU Tips ‘n Tricks Tips ‘n Tricks Table of Contents Tips ‘n Tricks Introduction. 1 TIP #1: TIP #2: TIP #3: TIP #4: TIP #5: TIP #6: TIP #7: TIP #8: TIP #9: TIP #10: TIP #11: TIP #12: Typical Ordering Considerations and
|
Original
|
ds41261ads41261a-pageschematic 20 pin lcd laptoppic18f interfacing with graphical lcd+8graphical lcd pins and interfacing diagramcs5460 adc code exampleds91084schematic 30 pin lcd laptoppic18f8xxxds00587schematic 20 pin lcd laptop 14pic16f913
|
PDF
|
|
Contextual Info: R e v is e d J a n u a ry 199 9 S E M I C D N D U C T D R tm MM74C89 64-Bit 3-STATE Random Access Read/Write Memory General Description Read O peration: T h e c o m p le m e n t o f th e in fo rm a tio n w h ic h w a s w ritte n in to th e m e m o ry is n o n -d e s tru c tiv e ly
|
OCR Scan
|
mm74c8964-bit |
PDF
|
DS00583
Abstract: PIC16XXX AN-1044 pic18 tdes AN1044 add round key for aes algorithm AN583 AN821 PIC17C42 PIC24
Contextual Info: AN1044 Data Encryption Routines for PIC24 and dsPIC Devices Authors: David Flowers and Howard Henry Schlunder Microchip Technology Inc. INTRODUCTION Currently, there are three data encryption standards approved for use in the Federal Information Processing
|
Original
|
an1044pic24dspic30/3364-bit+111970sgo36-4803ds01044a-pageds00583pic16xxxan-1044pic18 tdesadd round key for aes algorithman583an821pic17c42
|
PDF
|
74L85
Abstract: AN-90 MM74C85 MM74C85N MS-001 N16E
Contextual Info: O ctober 1987 Revised January 1999 S E M IC O N D U C TO R T M MM74C85 4-Bit Magnitude Comparator General Description V|N(1 applied to the A = B input and low level voltage T he M M 74C 85 is a four-bit m agnitude com parator which will perform com parison o f straight binary or BCD codes.
|
OCR Scan
|
mm74c8574l85an-90mm74c85n+2ms-001n16e
|
PDF
|
MM74C150
Abstract: MM74C150N MM82C19 MM82C19N N24A
Contextual Info: Revised January 1999 S E M IC O N D U C TO R T M MM74C150 • MM82C19 16-Line to 1-Line Multiplexer 3-STATE • 16-Line to 1-Line Multiplexer General Description All inputs are protected from dam age due to static dis charge by diode clam ps to V qq and GND.
|
OCR Scan
|
mm74c150mm82c1916-line1-of-16+3mm74c150nmm82c19nn24a
|
PDF
|
AN-90
Abstract: M16A MM74C174 MM74C174M MM74C174N MS-001 N16E
Contextual Info: R e v is e d J a n u a ry 1 9 9 9 S E M IC D N D U C T O R IM MM74C174 Hex D-Type Flip-Flop General Description Features T h e M M 7 4 C 1 7 4 h ex D -ty p e flip -flo p is a m o n o lith ic c o m p le m e n ta ry M O S C M O S in te g ra te d c irc u it c o n s tru c te d w ith
|
OCR Scan
|
mm74c174an-90m16amm74c174m+3mm74c174nms-001n16e
|
PDF
|
|
|
C74R
Abstract: sfr 0543 16C74 AN582 LM032L NC26 NC38 PIC16C64 PIC16CXX 287D
Contextual Info: Low-Power Real Time Clock AN582 Low-Power Real Time Clock INTRODUCTION the selected units will begin to flash. The CLR_MIN Key S3 clears the minutes and seconds. CLR_MIN is useful for exactly setting the time to the “top of the hour” as announced in radio broadcasts. After the INC or
|
Original
|
an582pic16cxxc74rsfr 0543+616c74lm032lnc26nc38pic16c64287d
|
PDF
|
AN-90
Abstract: M14A MM74C86 MM74C86M MM74C86N MS-001 N14A MM74LS
Contextual Info: Revised January 1999 MM74C86 Quad 2-Input EXCLUSIVE-OR Gate General Description Features The MM74C86 employs complementary MOS CMOS transistors to achieve wide power supply operating range, low power consumption and high noise margin these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel
|
Original
|
mm74c86an-90m14amm74c86m+4mm74c86nms-001n14amm74ls
|
PDF
|
200B
Abstract: AN581 AN586 PIC16C56 PIC16C57 PIC16C5X PIC16C64 PIC16C71 PIC16CXX
Contextual Info: Macros for Page and Bank Switching AN586 Macros for Page and Bank Switching not be confused with the similarly named bits in the PIC16CXX family PIC16C64, PIC16C71, etc. . The RP bits for the PIC16CXX family are found in the STATUS register, as opposed to the FSR register for the PIC16C5X
|
Original
|
an586pic16cxxpic16c64pic16c71+5pic16c5xan581200bpic16c56pic16c57
|
PDF
|
DS30189D
Abstract: r5 750 ohm resistor of 74LS244 eeprom programmer schematic 74ls244 pic programmer schematic DS30189 2N3904-18 AN589 200B 2N3904
Contextual Info: A PC-Based Development Programmer for the PIC16C84 AN589 A PC-Based Development Programmer for the PIC16C84 Author: Robert Spur - Analog Design Specialist, Inc. PROGRAMMING THE PIC16C84 MICROCONTROLLER After entering programming mode, RB7 is used to serially enter programming modes and data into the part. A
|
Original
|
pic16c84an589ds30189dr5 750 ohm resistor+7of 74ls244eeprom programmer schematic 74ls244pic programmer schematicds301892n3904-18200b2n3904
|
PDF
|
AN-90
Abstract: M14A MM74C164 MM74C164M MM74C164N MS-001 N14A
Contextual Info: Revised January 1999 MM74C164 8-Bit Parallel-Out Serial Shift Register General Description Features The MM74C164 shift registers are a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. These 8-bit
|
Original
|
mm74c164an-90m14amm74c164m+3mm74c164nms-001n14a
|
PDF
|
|
Contextual Info: DS3658 DS3658 Quad High Current Peripheral Driver Literature Number: SNLS365A DS3658 Quad High Current Peripheral Driver General Description The DS3658 quad peripheral driver is designed for those applications where low operating power, high breakdown voltage, high output current and low output ON voltage are
|
Original
|
ds3658snls365a |
PDF
|
200B
Abstract: AN583 PIC17C42
Contextual Info: AN583 Implementation of the Data Encryption Standard Using PIC17C42 Authors: Al Lovrich Mark Palmer Microchip Technology Inc. INTRODUCTION In January 1977, The United States government adopted a product cipher developed by IBM as its official encryption standard [1]. This algorithm, called the
|
Original
|
an583pic17c42ds00583a-page200b |
PDF
|
MS-013
Abstract: 16-LINE AN-90 M24B MM74C154 MM74C154N MM74C154WM MS-011 N24A h/73D36
Contextual Info: Revised July 2003 MM74C154 4-Line to 16-Line Decoder/Demultiplexer General Description Features The MM74C154 one of sixteen decoder is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. The device is provided with two strobe inputs, both of
|
Original
|
mm74c15416-linems-013an-90+6m24bmm74c154nmm74c154wmms-011n24ah/73d36
|
PDF
|
AN-90
Abstract: MM74C90 MM74C93 MM74C93N MS-001 N14A
Contextual Info: Revised January 2004 MM74C93 4-Bit Binary Counter General Description Features The MM74C93 binary counter and complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. The 4-bit binary counter can be reset to zero by applying high logic level on
|
Original
|
mm74c93mm74l93an-90mm74c90+3mm74c93nms-001n14a
|
PDF
|
AN-90
Abstract: MM74C42 MM74C42N MS-001 N16E
Contextual Info: Revised May 2002 MM74C42 BCD-to-Decimal Decoder General Description Features The MM74C42 one-of-ten decoder is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. This decoder produces a logical “0” at the output corresponding to a four
|
Original
|
mm74c42an-90mm74c42nms-001+1n16e
|
PDF
|